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@gastmaier gastmaier commented Nov 1, 2024

Changes to backport to main

driver=drivers/iio/adc/ad4052.c
doc=Documentation/iio/ad4052.rst
bin=Documentation/devicetree/bindings/iio/adc/adi,ad4052.yaml
inc=include/dt-bindings/iio/adc/adi,ad4052.h
abi=Documentation/ABI/testing/sysfs-bus-iio
adi=../linux
up=../../linux-upstream

up2adi () {
        cp $up/$driver $adi/$driver
        cp $up/$doc $adi/$doc
        cp $up/$bin $adi/$bin
        cp $up/$abi $adi/$abi
        cp $up/$inc $adi/$inc
        #sed -i -e 's/iio_device_release_direct(/iio_device_release_direct_mode(/g' \
        #       -e 's/\!iio_device_claim_direct(/iio_device_claim_direct_mode(/g' \
        sed -i -e 's/bool state/int state/' \
               -e 's/linux\/unaligned.h/asm-generic\/unaligned.h/' \
               -e 's/("IIO_DMAENGINE_BUFFER")/(IIO_DMAENGINE_BUFFER)/' $adi/$driver
}

PR Type

  • Bug fix (a change that fixes an issue)
  • New feature (a change that adds new functionality)
  • Breaking change (a change that affects other repos or cause CIs to fail)

PR Checklist

  • I have conducted a self-review of my own code changes
  • I have tested the changes on the relevant hardware
  • I have updated the documentation outside this repo accordingly (if there is the case)

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gastmaier commented Nov 4, 2024

Forced pushed to:

  • Add support to TIMER_CONFIG.FS_BURST_AUTO
  • Only write GP during probe.
  • Simplify IRQ Handler, leave to the user to clear the irq, because:
    • Entering config mode causes the irq to unset.
    • Re-entering monitor mode sets the irq back if still outside the threshold range, causing new handler calls.
    • "Ignoring next interrupt" would generate obnoxious logic.

Forced pushed (2) to:

  • Invert fs_burst_auto array entries, default all devices to 2MSPS (Yes, this value is -EINVAL for ad4056/ad4058, but is the datasheet reset value)

Forced pushed (3) to:

  • Clean-up unused enums.
  • Rename ad405x to ad4052 in the dts

@gastmaier gastmaier force-pushed the staging/ad4052 branch 3 times, most recently from 1f5b827 to 9611c42 Compare November 6, 2024 19:03
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Here it goes first round of review...

I think this one can be upstreamed without the offload bits

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@gastmaier gastmaier force-pushed the staging/ad4052 branch 2 times, most recently from 4b81da9 to 494d89f Compare November 12, 2024 00:15
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gastmaier commented Nov 12, 2024

Change log v0 -> v1

Review changes:

  • Move functional modes from devicetree entry to different OVERSAMPLING_RATIO values, affecting RAW read and buffered.
  • Documentation YAML fixes, removal of functional mode.
  • Header on alphabetical order.
  • Use field_prep
  • Remove forward declaration, reorder methods instead.
  • Fix cache line aligment.
  • Use devm runtime enable, remove manual remove.
  • Use dev_err_probe
  • General Documentation/.yaml fixes
  • Make all regmap_bulk dma safe.
  • Remove/simplify switch cases where not needed.
  • Instead of using of_node, use spi->irq directly
  • Use regmap update bits.
  • Use fsleep
  • Use oversampling iio property (value 0 is invalid, 1 put on Sample Mode, > 1 Burst Averaging mode)

New:

  • Add regmap access tables

Design changes:

  • Under IIO Event thrshold enabled (device Monitor Mode), return device access busy for every other access, simplifying logic by not requiring exiting and re-entering mode and having an obscure "monitoring downtime" during access.
  • Use oversampling iio prop instead of devicetree entry to switch functional modes.

tristate "Analog Devices AD4052 Driver"
depends on SPI
depends on PWM
depends on GPIOLIB
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I'm also not sure if gpio is something you should depend on or just select it. I think the single shot reading could be something useful to have even more to make this driver more upstreamable without offload support (we can still some questions about it though).

tristate "Analog Devices AD4052 Driver"
depends on SPI
depends on PWM
depends on GPIOLIB
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Also one not on the commit message. Style is iio: adc: .... Drop the drivers:

if (val == 0) {
st->mode = AD4052_SAMPLE_MODE;
} else {
st->mode = AD4052_BURST_AVERAGING_MODE;
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I would double check other examples of oversampling. To me this is a 1 or 0 thing. Either it's enabled it not. Your mode variable also just seems to have two states here so the way you're handling val raises some questions.

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The device supports from 2 to 4096 in powers of 2 samples for avg mode.
Decided to reserve 0 and 1 to disable the feature (return to sample mode)

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gastmaier commented Nov 17, 2024

Change log v1 -> v2

Review changes:

  • Include all peripheral properties
  • Drop cnv-gpio description
  • Updated dt-binding commit description
  • Replace d32 array by d16/d32 union (requires ignoring misleading checkpatch warning).
  • Remove MODULE_IMPORT_NS(IIO_AD4052);
  • Add error handling where missing
  • remove {} in single statement ifs, coherent style
  • Use multiple scan masks for changing precision due to oversampling
  • Move all if (st->mode == AD4052_MONITOR_MODE) inside the IIO mutex claim.
  • Drop switches where there is only one channel/event type
  • Remove unused AD4052_AVERAGING_MODE (would require a timed trigger) and AD4052_CONFIG_MODE (implicit mode outside any reading)
  • ad4052_set_avg_filter pass st directly.
  • Use different variables instead of the array for the chip_info

Changes:

  • Use GPIO interrupt instead of PS IRQ
  • All GPIOs are optional, does not require GPIO on KConfig. The user shall bring his own external trigger or short the CS and CNV, for example.
  • Move PWM sampling rate to IIO_ATTR
  • Move ext fs_burst_auto to channel sampling freq
  • Use Data Ready assertions for single shot readings, timeout after 1 second

Extra force push to resolve merge conflict

@gastmaier gastmaier requested a review from nunojsa November 25, 2024 13:20
@gastmaier gastmaier force-pushed the staging/ad4052 branch 2 times, most recently from eb23140 to 0506d4c Compare November 27, 2024 17:18
whame and others added 17 commits May 31, 2025 18:06
There is really no reason for having the `regmap` name as a macro
definition if it is only used once directly in `struct regmap_config`.
It is also more readable this way. Remove these macro definitions and
instead use the string literal directly.

Signed-off-by: Waqar Hameed <[email protected]>
Link: https://patch.msgid.link/3a8572de8316c7d2746c2ccea8c478f594221319.1748356671.git.waqar.hameed@axis.com
Signed-off-by: Jonathan Cameron <[email protected]>
These macro definitions are completely unused. Remove them.

Signed-off-by: Waqar Hameed <[email protected]>
Link: https://patch.msgid.link/0dec4fe7b2bdc90d06163ac75a53b97d4ae31c21.1748356671.git.waqar.hameed@axis.com
Signed-off-by: Jonathan Cameron <[email protected]>
ROHM BU79100G is a 12-bit, single channel ADC. From the software point
of view it is identical to the TI's ADS7866. Support reading ADC
measurements using the ad7476.c

Signed-off-by: Matti Vaittinen <[email protected]>
Link: https://patch.msgid.link/aDk2qNE9LTVnfAFM@mva-rohm
Signed-off-by: Jonathan Cameron <[email protected]>
Straight forward conversion from spear-adc.txt into yaml format.

Signed-off-by: Rodrigo Gobbi <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
Enable Vdrive power supply. The "vdrive-supply" property is mandatory,
already declared in fdt dt_schema.

Signed-off-by: Angelo Dureghello <[email protected]>
Link: https://patch.msgid.link/20250530-wip-bl-ad7606-reference-voltages-v2-1-d5e1ad7e6f14@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
Add optional refin voltage enabling. The property "refin-supply" is
already available and optional in the current fdt dt_schema.

Note that the driver does not need to take any actions if the supply
is not present because a pin strap is used to change the behavior
of the device if an external reference is connected.

Signed-off-by: Angelo Dureghello <[email protected]>
Link: https://patch.msgid.link/20250530-wip-bl-ad7606-reference-voltages-v2-2-d5e1ad7e6f14@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
Prevent triggers from stop working after the device has entered sleep:
use iio_device_suspend_triggering and iio_device_resume_triggering helpers.

Closes: https://lore.kernel.org/all/[email protected]
Signed-off-by: Denis Benato <[email protected]>
Tested-by: Justin Weiss <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
Prevent triggers from stop working after the device has entered sleep:
use iio_device_suspend_triggering and iio_device_resume_triggering helpers.

Closes: https://lore.kernel.org/all/[email protected]
Signed-off-by: Denis Benato <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
The AD4052/AD4058/AD4050/AD4056 are versatile, 16-bit/12-bit,
successive approximation register (SAR) analog-to-digital converter (ADC).

The scan_type depends if the oversampling feature is enabled, since the
16-bit device increases the SPI word size from 16-bit to 24-bit. Also
due to this, the spi message optimization is balanced on the buffer ops,
instead of once per probe.

The device has autonomous monitoring capabilities, that are exposed as
IIO events. Since register access requires leaving the monitoring state
and returning, device access is blocked until the IIO event is disabled.

The device contains two required outputs:

* gp0: Threshold event interrupt on the rising edge.
* gp1: ADC conversion ready signal on the falling edge.
       The user should either invert the signal or set the IRQ as falling edge.

And one optional input:

* cnv: Triggers a conversion, can be replaced by shortening the CNV and
  SPI CS trace.

The devices utilizes PM to enter the low power mode.

The driver can be used with SPI controllers with and without offload support.

A FPGA design is available:
https://analogdevicesinc.github.io/hdl/projects/ad4052_ardz/

The devices datasheet:
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4050-ad4056.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4052-ad4058.pdf

The unique monitoring capabilities and multiple GPIOs where the decision factor
to have a standalone driver for this device family.

Non-implemented features:

* Status word: First byte of the SPI transfer aligned to the register
  address.
* Averaging mode: Similar to burst averaging mode used in the
  oversampling, but requiring a sequence of CNV triggers for each
  conversion.
* Trigger mode: Similar to monitor mode used in the monitoring mode, but
  exits to configuration mode on event.

To: Jonathan Cameron <[email protected]>
To: Lars-Peter Clausen <[email protected]>
To: Michael Hennerich <[email protected]>
To: Rob Herring <[email protected]>
To: Krzysztof Kozlowski <[email protected]>
To: Conor Dooley <[email protected]>
To: Jonathan Corbet <[email protected]>
To: David Lechner <[email protected]>
To: Nuno Sá <[email protected]>
To: Andy Shevchenko <[email protected]>
To: Uwe Kleine-König <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Jorge Marques <[email protected]>
---
Changes in v3:
Documentation/ABI/testing/sysfs-bus-iio:
- oversampling_frequency and oversampling_frequency_available: target
  6.17 instead of 6.15

dt-bindings/adi,ad4052.yaml:
- add trigger-sources
- add sample dts with spi engine support


dt-bidings/ad4052.h (new to series):
- add header file with event and gpio values

ad4052.c:
- rework regmap and fields. always prefix field with reg name
  - create custom regmap bus to bound spi speed in configuration mode
- rework scantype:
  - drop offload scantype
  - use realbits to compute spi xfer length
  - set storagebits as 32-bits (fixed SPI Engine offload width)
      - tools use storagebits to compute the number of samples.
- reconsider spi speeds:
  - devicetree node: sets regmap spi speed, used for configuration
    access.
  - vio voltage: sets the adc access speed (higher than configuration
    mode).
- explicitily support only signed, removes conditionals checking if
  signed.
- add calibscale to configure scaling (MON_VAL), value 1 disable
  scaling.
- add get scale
- on sleep mode exit, sleep for 4ms (time required to power-on adc side
  and not trigger NOT_RDY_ERROR)

general:
- Break driver and doc commit into three: base driver, offload support,
  and events support, to be easier to review.
- Drop commit that sets get_current_scan_type as const.

- Link to v2: https://lore.kernel.org/r/[email protected]

Changes in v2:
dt-bindings:
- commit message: describe io, how each device differ, remove driver
  specifics.
- add interrupt names, format descriptions
- fix datasheet link
- add vdd/vio supply

documentation (new to series):
- add oversampling_frequency in sysfs-bus-iio

documentation/ad4052:
- rename sample_rate to conversion_frequency
- extend threshold event description

ad4052:
- use oversampling_frequency in burst_averaging_mode
- name the defines with register and label names, not only label
- remove defines that are used once, or may hard to understand, instead, have logic where they are used.
- due to the topology:
  - set spi_offload_trigger_config.type from PERIODIC to DATA_READY
  - handle the pwm_device on the driver.
- add oversampling_frequency and events_frequency to store distinct conversion_frequency
  and to write accordingly when entering monitor_mode or burst_averaging_mode
- set sampling frequency as the pwm_device frequency
- update production IDs values with the ones from the released parts
- use production IDs to obtain device grade.
- set chip info static
- remove ad4052_iio_device_claim_direct, and solve unbalances
- add missing rd_table, wr_table to regmap_config
- replace PTR_ERR_OR_ZERO with if IS_ERR return PTR_ERR
- rename ad4052_set_non_defaults with a ad4052_setup (more usual naming convention)
- reorder pm_runtime autosuspend to after enabling the pm

- Link to v1: https://lore.kernel.org/r/[email protected]

--- b4-submit-tracking ---
# This section is used internally by b4 prep for tracking purposes.
{
  "series": {
    "revision": 3,
    "change-id": "20250306-iio-driver-ad4052-a4acc3bb11b3",
    "prefixes": [],
    "history": {
      "v1": [
        "[email protected]"
      ],
      "v2": [
        "[email protected]"
      ]
    }
  }
}
Some devices have an internal clock used to space out the conversion
trigger for the oversampling filter, Consider an ADC with conversion and
data ready pins topology:

  Sampling trigger |       |       |       |       |
  ADC conversion   ++++    ++++    ++++    ++++    ++++
  ADC data ready      *       *       *       *       *

With the oversampling frequency, conversions are spaced:

  Sampling trigger |       |       |       |       |
  ADC conversion   + + + + + + + + + + + + + + + + + + + +
  ADC data ready         *       *       *       *       *

In some devices and ranges, this internal clock can be used to evenly
space the conversions between the sampling edge. In other devices the
oversampling frequency is fixed or is computed based on the sampling
frequency parameter, and the parameter is read only.

Signed-off-by: Jorge Marques <[email protected]>
Add dt-bindings for AD4052 family, devices AD4050/AD4052/AD4056/AD4058,
low-power with monitor capabilities SAR ADCs. Each variant of the family
differs in speed and resolution, resulting in different scan types and
spi word sizes, that are matched by the compatible with the chip_info.
The device contains one input (cnv) and two outputs (gp0, gp1).
The outputs can be configured for range of options, such as threshold
and data ready.
The spi-max-frequency refers to the configuration mode maximum access
speed. The ADC mode speed depends on the vio input voltage.

Signed-off-by: Jorge Marques <[email protected]>
This adds a new page to document how to use the ad4052 ADC driver.

Signed-off-by: Jorge Marques <[email protected]>
The AD4052/AD4058/AD4050/AD4056 are versatile, 16-bit/12-bit, successive
approximation register (SAR) analog-to-digital converter (ADC) that
enables low-power, high-density data acquisition solutions without
sacrificing precision. This ADC offers a unique balance of performance
and power efficiency, plus innovative features for seamlessly switching
between high-resolution and low-power modes tailored to the immediate
needs of the system. The AD4052/AD4058/AD4050/AD4056 are ideal for
battery-powered, compact data acquisition and edge sensing applications.

Signed-off-by: Jorge Marques <[email protected]>
Explain the AD4052 support for the SPI Engine Offload.

Signed-off-by: Jorge Marques <[email protected]>
Support SPI offload with appropriate FPGA firmware. Since the SPI-Engine
offload module always sends 32-bit data to the DMA engine, the
scantype.storagebytes is set to 32-bit and the SPI transfer length is
based on the scantype.realbits. This combination allows to optimize the
SPI to transfer only 2 or 3 bytes (depending on the granularity and
mode), while the number of samples are computed correctly by tools on
top of the iio scantype.

Signed-off-by: Jorge Marques <[email protected]>
Explain the AD4052 monitoring support by exposing as an IIO event.

Signed-off-by: Jorge Marques <[email protected]>
The AD4052 family supports autonomous monitoring readings for threshold
crossings. Add support for catching the GPIO interrupt and expose as an IIO
event. The device allows to set either, rising and falling directions. Only
either threshold crossing is implemented.

Signed-off-by: Jorge Marques <[email protected]>
@gastmaier gastmaier marked this pull request as draft June 4, 2025 11:53
@gastmaier gastmaier changed the base branch from main to mirror/jic23/iio/testing June 4, 2025 11:54
@github-actions github-actions bot force-pushed the mirror/jic23/iio/testing branch 7 times, most recently from e43d50b to 67693c4 Compare June 11, 2025 00:08
@github-actions github-actions bot force-pushed the mirror/jic23/iio/testing branch 3 times, most recently from edf51ce to b5616ca Compare June 14, 2025 00:07
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