drivers:platform:stm32:dma Added support for dma triggering

The trigger configuration is used to start an already configured dma transaction at a later time based on a signal from a different peripheral. It uses the mode, ID and polarity to configure based on users requirement. Signed-off-by: Swaroop PrakashKumar <[email protected]>
analogdevicesinc · Feb 18, 2025 · 5dfc14e · 5dfc14e
1 parent 125a6a4
commit 5dfc14e
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diff --git a/drivers/platform/stm32/stm32_dma.c b/drivers/platform/stm32/stm32_dma.c
@@ -67,6 +67,7 @@ int stm32_dma_config_xfer(struct no_os_dma_ch *channel,
 	struct stm32_dma_ch_priv_data *ch_priv_data;
 	uint32_t per_data_align, mem_data_align;
 	DMA_NodeConfTypeDef xfer_node_config = {0};
+	DMA_TriggerConfTypeDef trigger_config;
 #endif
 
 	if (!channel || !xfer || !channel->extra)
@@ -134,6 +135,39 @@ int stm32_dma_config_xfer(struct no_os_dma_ch *channel,
 		return -EINVAL;
 	}
 
+	if (sdma_ch->trig) {
+		switch (sdma_ch->trig->mode) {
+		case STM32_DMA_MODE_0:
+			trigger_config.TriggerMode = 0;
+			break;
+		case STM32_DMA_MODE_1:
+			trigger_config.TriggerMode = DMA_CTR2_TRIGM_0;
+			break;
+		case STM32_DMA_MODE_2:
+			trigger_config.TriggerMode = DMA_CTR2_TRIGM_1;
+			break;
+		case STM32_DMA_MODE_3:
+			trigger_config.TriggerMode = DMA_CTR2_TRIGM;
+			break;
+		default:
+			return -EINVAL;
+		}
+		switch (sdma_ch->trig->polarity) {
+		case STM32_DMA_TRIG_MASKED:
+			trigger_config.TriggerPolarity = 0;
+			break;
+		case STM32_DMA_TRIG_RISING:
+			trigger_config.TriggerPolarity = DMA_CTR2_TRIGPOL_0;
+			break;
+		case STM32_DMA_TRIG_FALLING:
+			trigger_config.TriggerPolarity = DMA_CTR2_TRIGPOL_1;
+			break;
+		default:
+			return -EINVAL;
+		}
+		trigger_config.TriggerSelection = sdma_ch->trig->id;
+	}
+
 	switch (xfer->xfer_type) {
 	case MEM_TO_MEM:
 		sdma_ch->hdma->Init.Direction = DMA_MEMORY_TO_MEMORY;
@@ -156,6 +190,11 @@ int stm32_dma_config_xfer(struct no_os_dma_ch *channel,
 		if (ret != HAL_OK)
 			return -EINVAL;
 
+		if (sdma_ch->trig) {
+			ret = HAL_DMAEx_ConfigTrigger(sdma_ch->hdma, &trigger_config);
+			if (ret != HAL_OK)
+				return -EINVAL;
+		}
 		break;
 	case DMA_CIRCULAR_MODE:
 		xfer_node_config.NodeType = DMA_GPDMA_LINEAR_NODE;
@@ -165,6 +204,12 @@ int stm32_dma_config_xfer(struct no_os_dma_ch *channel,
 		xfer_node_config.DstAddress = (uint32_t) xfer->dst;
 		xfer_node_config.DataSize = (uint32_t) xfer->length;
 
+		if (sdma_ch->trig) {
+			xfer_node_config.TriggerConfig.TriggerMode = trigger_config.TriggerMode;
+			xfer_node_config.TriggerConfig.TriggerPolarity = trigger_config.TriggerPolarity;
+			xfer_node_config.TriggerConfig.TriggerSelection =
+				trigger_config.TriggerSelection;
+		}
 		/* Remove all the previous nodes */
 		if (ch_priv_data) {
 			/* Reset, Unlink and DeInit the previous list */

diff --git a/drivers/platform/stm32/stm32_dma.h b/drivers/platform/stm32/stm32_dma.h
@@ -57,6 +57,40 @@ enum stm32_dma_mode {
 	DMA_CIRCULAR_MODE = 1
 };
 
+/**
+ * @enum stm32_dma_trig_mode
+ * @brief DMA Trigger Modes
+ */
+enum stm32_dma_trig_mode {
+	STM32_DMA_MODE_0,
+	STM32_DMA_MODE_1,
+	STM32_DMA_MODE_2,
+	STM32_DMA_MODE_3
+};
+
+/**
+ * @enum stm32_dma_trig_pol
+ * @brief DMA Trigger Polarity
+ */
+enum stm32_dma_trig_pol {
+	STM32_DMA_TRIG_MASKED,
+	STM32_DMA_TRIG_RISING,
+	STM32_DMA_TRIG_FALLING,
+};
+
+/**
+ * @struct stm32_dma_trigger
+ * @brief Trigger descriptor for triggering a DMA transfer
+ */
+struct stm32_dma_trigger {
+	/** Trigger ID */
+	uint32_t id;
+	/** Mode of trigger */
+	enum stm32_dma_trig_mode mode;
+	/** Polarity of trigger */
+	enum stm32_dma_trig_pol polarity;
+};
+
 /**
  * @struct stm32_dma_channel
  * @brief STM32 DMA Channels
@@ -76,6 +110,8 @@ struct stm32_dma_channel {
 	enum stm32_dma_data_alignment per_data_alignment;
 	/* DMA Mode */
 	enum stm32_dma_mode dma_mode;
+	/* Trigger configuration */
+	struct stm32_dma_trigger *trig;
 	/* Source Address for the data */
 	uint8_t* src;
 	/* Destination Address for the data */