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FEAT: VSin, ISin Sources added to Maxwell Circuit Primitives #5283
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Create Page and Select Page added to Circuit Primitives
Thanks for opening a Pull Request. If you want to perform a review write a comment saying: @ansys-reviewer-bot review |
Codecov ReportAttention: Patch coverage is
Additional details and impacted files@@ Coverage Diff @@
## main #5283 +/- ##
=======================================
Coverage 84.39% 84.39%
=======================================
Files 140 140
Lines 58645 58684 +39
=======================================
+ Hits 49493 49528 +35
- Misses 9152 9156 +4 |
Create Page and Select Page added to Circuit Primitives
…s' into 5282-Add-Missing-Circuit-Elements # Conflicts: # src/ansys/aedt/core/modeler/circuits/primitives_circuit.py
Create Page and Select Page added to Circuit Primitives
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Thanks for the changes, could you address the comments and add tests ?
src/ansys/aedt/core/modeler/circuits/primitives_maxwell_circuit.py
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src/ansys/aedt/core/modeler/circuits/primitives_maxwell_circuit.py
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src/ansys/aedt/core/modeler/circuits/primitives_maxwell_circuit.py
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src/ansys/aedt/core/modeler/circuits/primitives_maxwell_circuit.py
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Create Page added to Circuit Primitives
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@DaveTwyman please install pre-commit in your venv because I see that every time you push a commit it automatically triggers the auto fixes pre-commit: Also remember to update and merge main in your branch from time to time. |
@gmalinve Good point about the pre-commit, I see it's installed on my machine. I've just updated it too. I guess the issue is I need to start using it before each push. I believe I'm updating main before each push from PyCharm, but let me know if you can see evidence something is wrong here. Thanks again as always |
@DaveTwyman If it is installed on your machine then it shouldn't let you commit. The precommit should trigger the problems locally before allowing you to make any commit. |
Ok, understood, I'm just reading up on how to set this up now |
@DaveTwyman you need to add unit tests now :) |
@SMoraisAnsys , Not at all, thanks for your patience whilst I work through this. I could do with some guidance on the unit test for the 'create_page', there is no way to check on the pages name, index or other properties, the underlying IronPython doesn't have such a feature. Are you aware of another instance in PyAEDT where we create something that cannot then be queried. I could then copy that UT. In this case there isn't a useful check that can be added to the UT. Should we do something like add a dummy UT, that just holds a comment? |
…ges. All elements now support names that are Strings, Integers, Floats or left blank as per expected Maxwell circuit schematic usage.
I went through |
Yes!, 'GetNumPages', how did I miss that, Thanks |
Hi @DaveTwyman, could you please add the last changes required for this PR ? :) |
Yes, I'm planning to get back to finish that shortly
…________________________________
From: Sébastien Morais ***@***.***>
Sent: Tuesday, October 29, 2024 10:45
To: ansys/pyaedt ***@***.***>
Cc: David Twyman ***@***.***>; Mention ***@***.***>
Subject: Re: [ansys/pyaedt] FEAT: VSin, ISin Sources added to Maxwell Circuit Primitives (PR #5283)
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Hi @DaveTwyman<https://github.com/DaveTwyman>, could you please add the last changes required for this PR ? :)
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Reply to this email directly, view it on GitHub<#5283 (comment)>, or unsubscribe<https://github.com/notifications/unsubscribe-auth/AVVIYTCE36KV4RDR3OZAJQDZ55RNJAVCNFSM6AAAAABPYVZE36VHI2DSMVQWIX3LMV43OSLTON2WKQ3PNVWWK3TUHMZDINBTHA3DMNBZGQ>.
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Hello @SMoraisAnsys , I've added the last unit test, and method needed to support that test (plus another unit test for the new method). So all the new methods now have supporting unit tests. It seems that the test coverage codecov is very low, do you think this is because of making multiple single line changes 'id' to 'component' or issues elsewhere? |
Try to run your test locally and see if it is correctly covered. It might be a codecov issue (but I doubt about it). |
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@DaveTwyman please review and fix all the comments.
You created unit tests that don't run at all. Please test, run and debug locally before pushing commits to your PR.
src/ansys/aedt/core/modeler/circuits/primitives_maxwell_circuit.py
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src/ansys/aedt/core/modeler/circuits/primitives_maxwell_circuit.py
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Co-authored-by: gmalinve <[email protected]>
Co-authored-by: gmalinve <[email protected]>
Co-authored-by: gmalinve <[email protected]>
Co-authored-by: gmalinve <[email protected]>
Co-authored-by: gmalinve <[email protected]>
…uld not be in circuit.py. -Replaced set_property method with parameter method. -Added example in docstring for create_i_sin and create_v_sin. -Added more checks for create_voltage_source and create_current_source name types in unit tests. -Moved create_page and get_num_pages unit tests to test_35_MaxwellCircuit.py -Added assert not to two of the unit tests
…Missing-Circuit-Elements
# Conflicts: # tests/system/general/test_21_Circuit.py
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Create Page and Select Page added to Circuit Primitives