Merge pull request #131 from antmicro/verilator-uvm-testbench #453
ci.yml
on: push
Matrix: Build-Verilator / Build Verilator
Build-Spike
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Build Spike
5m 40s
Matrix: Test-Verification / Verification tests
Waiting for pending jobs
Matrix: Test-Regression / Regression tests
Waiting for pending jobs
Test-Microarchitectural
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Lint microarchitectural tests
Test-UVM
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UVM tests
Matrix: Test-Microarchitectural / Microarchitectural tests
Waiting for pending jobs
Matrix: Test-RISCOF / Run RISCOF tests
Waiting for pending jobs
Test-RISCV-DV
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Build VeeR-ISS
Test-RISCV-DV
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Download Renode
Matrix: Test-RISCV-DV / Generate code for tests
Waiting for pending jobs
Matrix: Test-RISCV-DV / Run RISC-V DV tests
Waiting for pending jobs
Publish-to-GH-Pages
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Build and Main Deploy
Annotations
3 errors
Build-Verilator / Build Verilator (uvm, antmicro/verilator-1, df36e9ca2597aebe4b92c72461d945745b36c3e0)
Process completed with exit code 128.
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Build-Verilator / Build Verilator (v5.010, verilator/verilator, v5.010)
The job was canceled because "uvm_antmicro_verilator-1_" failed.
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Build-Verilator / Build Verilator (v5.010, verilator/verilator, v5.010)
The operation was canceled.
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