Fix memory initialization in mem-tb #676
Merged
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Mem-tb testbench currently doesn't work, because the memory isn't initialized with
FF
values as expected in the test. The initialization is done onposedge(reset
:verilator-verification-features-tests/tests/uvm-testbenches/mem-tb/hdl/design.sv
Line 39 in 3c4beb0
which isn't triggered by the variable initialization. It works when the delay is added.
The testbench stooped working after verilator/verilator@0aa8356. With that commit, the output of
%m
has changed: https://github.com/antmicro/uvm-verilator/blob/795b5f263c5d440c26e6d3598b406d44dd23fbd9/src/base/uvm_misc.svh#L110which is then used in computation of random seed, which should always be the same.
%m
changed, so did the seed and the values that were obtained by randomization. We entered into the case in which we read the memory cell which wasn't written and the tests started failing. It seems that this case wasn't tested before.