tests: protection: add riscv support

Execute tests are disabled for RISC-V because is isn't able to set an execution restriction. From RISC-V documentation: "Instruction address-translation and protection are unaffected by the setting of MPRV" MPRV is used to apply memory protection restriction when CPU is running in machine mode (kernel). Signed-off-by: Alexandre Mergnat <[email protected]>
antmicro · Nov 9, 2020 · 0a5b259 · 0a5b259
1 parent 39208c2
commit 0a5b259
Showing 1 changed file with 5 additions and 0 deletions.
diff --git a/tests/kernel/mem_protect/protection/src/main.c b/tests/kernel/mem_protect/protection/src/main.c
@@ -20,6 +20,11 @@
 #define SKIP_EXECUTE_TESTS
 #endif
 
+/* RISC-V have no mechanism to restrict execution */
+#if defined(CONFIG_RISCV)
+#define SKIP_EXECUTE_TESTS
+#endif
+
 #define INFO(fmt, ...) printk(fmt, ##__VA_ARGS__)
 
 void k_sys_fatal_error_handler(unsigned int reason, const z_arch_esf_t *pEsf)