Making Linux capable RISC-V Core one flip flop and LUT at a time (ArmleoCPU). ASIC Digital Design Engineer. Previously Node.js developer.
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armleo_gpio
armleo_gpio PublicHighSpeed LVCMOS IO Cell IP for sky130; GPLv3 licensed. Use at your own risk. MPW5 Tapeout: https://github.com/armleo/armleo_gpio_mpw5
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armleo_gpio_mpw5
armleo_gpio_mpw5 PublicA test chip tapeout for MPW5 (confirmed); HighSpeed LVCMOS IO Cell IP for sky130: https://github.com/armleo/armleo_gpio
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sdram_controller
sdram_controller PublicSDR SDRAM Controller with Avalon-MM bus; [Bugged, deprecated]
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