arch: arm: Add initial support for Cortex-M85 Core

Add initial support for the Cortex-M85 Core which is an implementation of the Armv8.1-M mainline architecture. The support is based on the Cortex-M55 support that already exists in Zephyr. Signed-off-by: Duy Nguyen <[email protected]>
aspeeddylan · Jun 26, 2024 · 259b3d0 · 259b3d0
1 parent fa9e933
commit 259b3d0
Show file tree

Hide file tree

Showing 11 changed files with 62 additions and 3 deletions.
diff --git a/arch/arm/core/cortex_m/Kconfig b/arch/arm/core/cortex_m/Kconfig
@@ -73,6 +73,17 @@ config CPU_CORTEX_M55
 	help
 	  This option signifies the use of a Cortex-M55 CPU
 
+config CPU_CORTEX_M85
+	bool
+	select CPU_CORTEX_M
+	select ARMV8_1_M_MAINLINE
+	select ARMV8_M_SE if CPU_HAS_TEE
+	select ARMV7_M_ARMV8_M_FP if CPU_HAS_FPU
+	select CPU_HAS_DCACHE
+	select CPU_HAS_ICACHE
+	help
+	  This option signifies the use of a Cortex-M85 CPU
+
 config CPU_CORTEX_M7
 	bool
 	select CPU_CORTEX_M

diff --git a/arch/arm/core/mpu/arm_mpu.c b/arch/arm/core/mpu/arm_mpu.c
@@ -54,6 +54,7 @@ static uint8_t static_regions_num;
 #elif defined(CONFIG_CPU_CORTEX_M23) || \
 	defined(CONFIG_CPU_CORTEX_M33) || \
 	defined(CONFIG_CPU_CORTEX_M55) || \
+	defined(CONFIG_CPU_CORTEX_M85) || \
 	defined(CONFIG_AARCH32_ARMV8_R)
 #include "arm_mpu_v8_internal.h"
 #else

diff --git a/arch/arm/core/mpu/arm_mpu_v8_internal.h b/arch/arm/core/mpu/arm_mpu_v8_internal.h
@@ -31,7 +31,7 @@ struct dynamic_region_info {
  */
 static struct dynamic_region_info dyn_reg_info[MPU_DYNAMIC_REGION_AREAS_NUM];
 #if defined(CONFIG_CPU_CORTEX_M23) || defined(CONFIG_CPU_CORTEX_M33) || \
-	defined(CONFIG_CPU_CORTEX_M55)
+	defined(CONFIG_CPU_CORTEX_M55) || defined(CONFIG_CPU_CORTEX_M85)
 static inline void mpu_set_mair0(uint32_t mair0)
 {
 	MPU->MAIR0 = mair0;

diff --git a/cmake/gcc-m-cpu.cmake b/cmake/gcc-m-cpu.cmake
@@ -34,6 +34,16 @@ if("${ARCH}" STREQUAL "arm")
     else()
       set(GCC_M_CPU cortex-m55+nodsp)
     endif()
+  elseif(CONFIG_CPU_CORTEX_M85)
+    if    (CONFIG_ARMV8_1_M_MVEF)
+      set(GCC_M_CPU cortex-m85)
+    elseif(CONFIG_ARMV8_1_M_MVEI)
+      set(GCC_M_CPU cortex-m85+nomve.fp)
+    elseif(CONFIG_ARMV8_M_DSP)
+      set(GCC_M_CPU cortex-m85+nomve)
+    else()
+      set(GCC_M_CPU cortex-m85+nodsp)
+    endif()
   elseif(CONFIG_CPU_CORTEX_R4)
     if(CONFIG_FPU AND CONFIG_CPU_HAS_VFP)
       set(GCC_M_CPU cortex-r4f)

diff --git a/cmake/gcc-m-fpu.cmake b/cmake/gcc-m-fpu.cmake
@@ -39,6 +39,10 @@ if("${ARCH}" STREQUAL "arm")
     set(FPU_FOR_cortex-m55+nomve.fp auto)
     set(FPU_FOR_cortex-m55+nomve    auto)
     set(FPU_FOR_cortex-m55+nodsp    auto)
+    set(FPU_FOR_cortex-m85          auto)
+    set(FPU_FOR_cortex-m85+nomve.fp auto)
+    set(FPU_FOR_cortex-m85+nomve    auto)
+    set(FPU_FOR_cortex-m85+nodsp    auto)
 
     set(GCC_M_FPU ${FPU_FOR_${GCC_M_CPU}})
   endif()

diff --git a/dts/bindings/cpu/arm,cortex-m85.yaml b/dts/bindings/cpu/arm,cortex-m85.yaml
@@ -0,0 +1,8 @@
+# Copyright (c) 2024 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+description: ARM Cortex-M85 CPU
+
+compatible: "arm,cortex-m85"
+
+include: arm,cortex-m.yaml
diff --git a/dts/bindings/cpu/arm,cortex-m85f.yaml b/dts/bindings/cpu/arm,cortex-m85f.yaml
@@ -0,0 +1,8 @@
+# Copyright (c) 2024 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+description: ARM Cortex-M85F CPU
+
+compatible: "arm,cortex-m85f"
+
+include: arm,cortex-m.yaml
diff --git a/include/zephyr/arch/arm/cortex_m/memory_map.h b/include/zephyr/arch/arm/cortex_m/memory_map.h
@@ -67,7 +67,8 @@
 #define _PPB_INT_RSVD_2           0xE000F000
 #elif defined(CONFIG_CPU_CORTEX_M23) || \
 	defined(CONFIG_CPU_CORTEX_M33) || \
-	defined(CONFIG_CPU_CORTEX_M55)
+	defined(CONFIG_CPU_CORTEX_M55) || \
+	defined(CONFIG_CPU_CORTEX_M85)
 #define _PPB_INT_RSVD_0           0xE0000000
 #define _PPB_INT_SCS              0xE000E000
 #define _PPB_INT_SCB              0xE000ED00
@@ -88,7 +89,8 @@
 #define _PPB_EXT_PPB              0xE0042000
 #define _PPB_EXT_ROM_TABLE        0xE00FF000
 #define _PPB_EXT_END_ADDR         0xE00FFFFF
-#elif defined(CONFIG_CPU_CORTEX_M33) || defined(CONFIG_CPU_CORTEX_M55)
+#elif defined(CONFIG_CPU_CORTEX_M33) || defined(CONFIG_CPU_CORTEX_M55) \
+	|| defined(CONFIG_CPU_CORTEX_M85)
 #undef  _PPB_EXT_BASE_ADDR
 #define _PPB_EXT_BASE_ADDR        0xE0044000
 #define _PPB_EXT_ROM_TABLE        0xE00FF000

diff --git a/include/zephyr/arch/arm/mpu/arm_mpu.h b/include/zephyr/arch/arm/mpu/arm_mpu.h
@@ -15,6 +15,7 @@
 #elif defined(CONFIG_CPU_CORTEX_M23) || \
 	defined(CONFIG_CPU_CORTEX_M33) || \
 	defined(CONFIG_CPU_CORTEX_M55) || \
+	defined(CONFIG_CPU_CORTEX_M85) || \
 	defined(CONFIG_AARCH32_ARMV8_R)
 #include <zephyr/arch/arm/mpu/arm_mpu_v8.h>
 #else

diff --git a/modules/cmsis/cmsis_core_m_defaults.h b/modules/cmsis/cmsis_core_m_defaults.h
@@ -64,6 +64,8 @@ typedef enum {
 #define __CM33_REV       0
 #elif defined(CONFIG_CPU_CORTEX_M55)
 #define __CM55_REV       0
+#elif defined(CONFIG_CPU_CORTEX_M85)
+#define __CM85_REV       0
 #else
 #error "Unknown Cortex-M device"
 #endif
@@ -135,6 +137,8 @@ typedef enum {
 #include <core_cm33.h>
 #elif defined(CONFIG_CPU_CORTEX_M55)
 #include <core_cm55.h>
+#elif defined(CONFIG_CPU_CORTEX_M85)
+#include <core_cm85.h>
 #else
 #error "Unknown Cortex-M device"
 #endif

diff --git a/subsys/mgmt/mcumgr/grp/os_mgmt/include/os_mgmt_processor.h b/subsys/mgmt/mcumgr/grp/os_mgmt/include/os_mgmt_processor.h
@@ -47,6 +47,16 @@ extern "C" {
 #else
 #define PROCESSOR_NAME "cortex-m55+nodsp"
 #endif
+#elif defined(CONFIG_CPU_CORTEX_M85)
+#if defined(CONFIG_ARMV8_1_M_MVEF)
+#define PROCESSOR_NAME "cortex-m85"
+#elif defined(CONFIG_ARMV8_1_M_MVEI)
+#define PROCESSOR_NAME "cortex-m85+nomve.fp"
+#elif defined(CONFIG_ARMV8_M_DSP)
+#define PROCESSOR_NAME "cortex-m85+nomve"
+#else
+#define PROCESSOR_NAME "cortex-m85+nodsp"
+#endif
 #elif defined(CONFIG_CPU_CORTEX_R4)
 #if defined(CONFIG_FPU) && defined(CONFIG_CPU_HAS_VFP)
 #define PROCESSOR_NAME "cortex-r4f"