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perf/perf_genericevents.py: Use AMD Zen for parsing
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CPU event mappings for AMD Zen processors can vary within the same family.
Hence, switch to using the core generation for mapping events.
The core generation can be determined by inspecting family and
model combinations.

Also update raw_code.cfg with latest event mappings and add an AMD Zen
specific formula for computing the raw event code. The formula assumes
that the "event" field occupies bits 35:32,7:0 and the "umask" field
occupies bits 15:8 as described in the AMD PPRs.

Suggested-by: Sandipan Das <[email protected]>
Signed-off-by: Ayush Jain <[email protected]>
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AYUSHJAIN951 committed Apr 1, 2024
1 parent dd7d9b7 commit 87d6cb1
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46 changes: 31 additions & 15 deletions perf/perf_genericevents.py
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,10 @@
#
#
# Copyright: 2017 IBM
# Copyright (C) 2024 Advanced Micro Devices, Inc.
# Author: Athira Rajeev<[email protected]>
# Author: Shriya Kulkarni <[email protected]>
# Author: Ayush Jain <[email protected]>

import os
import configparser
Expand Down Expand Up @@ -46,19 +48,28 @@ def read_generic_events(self):
self.generic_events = dict(parser.items('POWER10'))
else:
self.cancel("Processor is not supported: %s" % cpu_info)
if 'amd' in cpu.get_vendor():
for line in cpu_info.splitlines():
if 'cpu family' in line:
self.family = int(line.split(':')[1])
self.arch = cpu.get_arch()
self.vendor = cpu.get_vendor()
if 'amd' in self.vendor:
self.family = cpu.get_family()
if self.family == 0x16:
self.log.info("AMD Family: 16h")
self.generic_events = dict(parser.items('AMD16h'))
elif self.family >= 0x17:
self.log.info("AMD Family: 17h")
self.generic_events = dict(parser.items('AMD17h'))
self.amd_zen = cpu.get_x86_amd_zen()
if self.amd_zen is None:
self.cancel("Unsupported AMD ZEN")
self.log.info(f"AMD Family: {self.family} ZEN{self.amd_zen}")
if f'AMDZEN{self.amd_zen}' in parser.keys() is not None:
self.generic_events = dict(parser.items(f'AMDZEN{self.amd_zen}'))
else:
self.cancel(f"AMD ZEN{self.amd_zen} raw_code cfg not found")
else:
self.cancel("Unsupported AMD Family")

def hex_to_int(self, input):
return int(input, 0)

def test(self):
nfail = 0
dir = "/sys/bus/event_source/devices/cpu/events"
Expand All @@ -71,19 +82,24 @@ def test(self):
if val is None:
continue
if 'umask' in event_code:
self.log.debug("EventCode: %s" % event_code)
event = (event_code.split('0x')[1]).rstrip(',umask=')
umask = event_code.split('=', 2)[2].rstrip()
raw_code = umask + event
if self.arch == "x86_64" and 'amd' in self.vendor:
umask = self.hex_to_int(umask)
event = self.hex_to_int(event_code.split('=', 2)[1].rstrip(',umask='))
raw_code = (event & 0xff) | (umask << 8) | ((event & 0xf00) << 24)
else:
event = (event_code.split('0x')[1]).rstrip(',umask=')
raw_code = self.hex_to_int(umask + event)
else:
raw_code = event_code.split('=', 2)[1].rstrip()
raw_code = self.hex_to_int(event_code.split('=', 2)[1].rstrip())

self.log.info('FILE in %s is %s' % (dir, file))
if raw_code != val:
if raw_code != self.hex_to_int(val):
nfail += 1
self.log.info('FAIL : Expected value is %s but got '
'%s' % (val, raw_code))
self.log.info('FAIL : Expected value is %s or %s but got '
'%s' % (val, self.hex_to_int(val), raw_code))
else:
self.log.info('PASS : Expected value: %s and got '
'%s' % (val, raw_code))
self.log.info('PASS : Expected value: %s or %s and got '
'%s' % (val, self.hex_to_int(val), raw_code))
if nfail != 0:
self.fail('Failed to verify generic PMU event codes')
40 changes: 39 additions & 1 deletion perf/perf_genericevents.py.data/raw_code.cfg
Original file line number Diff line number Diff line change
Expand Up @@ -89,7 +89,7 @@ branch-misses = 0xc3
stalled-cycles-frontend = 0xd0
stalled-cycles-backend = 0xd1

[AMD17h]
[AMDZEN1]
cpu-cycles = 0x76
instructions = 0xc0
cache-references = 0xff60
Expand All @@ -98,3 +98,41 @@ branch-instructions = 0xc2
branch-misses = 0xc3
stalled-cycles-frontend = 0x0287
stalled-cycles-backend = 0x0187

[AMDZEN2]
cpu-cycles = 0x76
instructions = 0xc0
cache-references = 0xff60
cache-misses = 0x0964 0x964
branch-instructions = 0xc2
branch-misses = 0xc3
stalled-cycles-frontend = 0xa9

[AMDZEN3]
cpu-cycles = 0x76
instructions = 0xc0
cache-references = 0xff60
cache-misses = 0x0964
branch-instructions = 0xc2
branch-misses = 0xc3
stalled-cycles-frontend = 0xa9

[AMDZEN4]
cpu-cycles = 0x76
instructions = 0xc0
cache-references = 0xff60
cache-misses = 0x0964
branch-instructions = 0xc2
branch-misses = 0xc3
stalled-cycles-frontend = 0xa9
ref-cycles = 0x120

[AMDZEN5]
cpu-cycles = 0x76
instructions = 0xc0
cache-references = 0xff60
cache-misses = 0x0964
branch-instructions = 0xc2
branch-misses = 0xc3
stalled-cycles-frontend = 0xa9
ref-cycles = 0x120

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