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Adds 9bit reception support to the TI uart drivers. #713

Merged
merged 5 commits into from
Jul 8, 2023
Merged

Adds 9bit reception support to the TI uart drivers. #713

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8f0dfc7
Adds 9bit reception capability to the CC32xxUart.
balazsracz May 6, 2023
0b3174b
Merge branch 'master' into bracz-tiuart-ninebit
balazsracz May 6, 2023
dbca917
Adds 9bit to the tiva UART as well.
balazsracz May 6, 2023
0496cf4
Merge branch 'master' into bracz-tiuart-ninebit
balazsracz Jul 8, 2023
e4c9d95
Fix comments.
balazsracz Jul 8, 2023
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2 changes: 2 additions & 0 deletions include/freertos/tc_ioctl.h
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Original file line number Diff line number Diff line change
Expand Up @@ -46,6 +46,8 @@
#define TCPAREVEN IO(TERMIOS_IOC_MAGIC, 0xF2)
#define TCPARONE IO(TERMIOS_IOC_MAGIC, 0xF3)
#define TCPARZERO IO(TERMIOS_IOC_MAGIC, 0xF4)
/// Use 9-bit reception mode
#define TCNINEBITRX IO(TERMIOS_IOC_MAGIC, 0xF5)
/// One stop bit
#define TCSTOPONE IO(TERMIOS_IOC_MAGIC, 0xF8)
/// Two stop bits
Expand Down
37 changes: 33 additions & 4 deletions src/freertos_drivers/ti/CC32xxUart.cxx
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Original file line number Diff line number Diff line change
Expand Up @@ -75,6 +75,7 @@ CC32xxUart::CC32xxUart(const char *name, unsigned long base, uint32_t interrupt,
, uartMode_(mode | UART_CONFIG_PAR_NONE)
, txPending_(false)
, hwFIFO_(hw_fifo)
, nineBit_(false)
{
static_assert(
UART_CONFIG_PAR_NONE == 0, "driverlib changed against our assumptions");
Expand Down Expand Up @@ -169,6 +170,13 @@ int CC32xxUart::ioctl(File *file, unsigned long int key, unsigned long data)
uartMode_ |= UART_CONFIG_PAR_ONE;
MAP_UARTParityModeSet(base_, UART_CONFIG_PAR_ONE);
break;
case TCNINEBITRX:
nineBit_ = data != 0;
if (!nineBit_)
{
break;
}
// fall through
case TCPARZERO:
uartMode_ &= ~UART_CONFIG_PAR_MASK;
uartMode_ |= UART_CONFIG_PAR_ZERO;
Expand Down Expand Up @@ -289,14 +297,35 @@ void CC32xxUart::interrupt_handler()
while (MAP_UARTCharsAvail(base_))
{
long data = MAP_UARTCharGetNonBlocking(base_);
if (data >= 0 && data <= 0xff)
if (nineBit_)
{
unsigned char c = data;
if (rxBuf->put(&c, 1) == 0)
if (rxBuf->space() < 2)
{
++overrunCount;
}
rxBuf->signal_condition_from_isr();
else
{
// parity error bit is moved to the ninth bit, then two bytes
// are written to the buffer.
long bit9 = (data & 0x200) >> 1;
data &= 0xff;
data |= bit9;
rxBuf->put((uint8_t *)&data, 2);
rxBuf->signal_condition_from_isr();
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The if/else [overrun] logic for signal_condition_from_isr() is not the same for both 9 and 8 bit data paths. I think technically either is actually fine, but we should be consistent. Pick one and modify the other to match.

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fixed

}
}
else if (data >= 0 && data <= 0xff)
{
if (rxBuf->space() < 1)
{
++overrunCount;
}
else
{
unsigned char c = data;
rxBuf->put(&c, 1);
rxBuf->signal_condition_from_isr();
}
}
}
/* transmit a character if we have pending tx data */
Expand Down
1 change: 1 addition & 0 deletions src/freertos_drivers/ti/CC32xxUart.hxx
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Expand Up @@ -124,6 +124,7 @@ private:
uint32_t uartMode_; /**< mode of the UART, 8 or 9 bit, 1 or 2 stop... */
uint8_t txPending_; /**< transmission currently pending */
uint8_t hwFIFO_; /**< true if hardware fifo is to be enabled, else false */
uint8_t nineBit_; /**< true if using 9-bit reception */

/** Default constructor.
*/
Expand Down
1 change: 1 addition & 0 deletions src/freertos_drivers/ti/TivaDev.hxx
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Expand Up @@ -229,6 +229,7 @@ private:
uint8_t hwFIFO_; /**< enable HW FIFO */
uint8_t uartMode_; /**< uart config (mode) flags */
uint8_t txPending_; /**< transmission currently pending */
uint8_t nineBit_; /**< true if using 9-bit reception */

/** Default constructor.
*/
Expand Down
39 changes: 34 additions & 5 deletions src/freertos_drivers/ti/TivaUart.cxx
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Original file line number Diff line number Diff line change
Expand Up @@ -71,6 +71,7 @@ TivaUart::TivaUart(const char *name, unsigned long base, uint32_t interrupt,
, hwFIFO_(hw_fifo)
, uartMode_(mode)
, txPending_(false)
, nineBit_(false)
{
static_assert(
UART_CONFIG_PAR_NONE == 0, "driverlib changed against our assumptions");
Expand Down Expand Up @@ -218,14 +219,35 @@ void TivaUart::interrupt_handler()
while (MAP_UARTCharsAvail(base_))
{
long data = MAP_UARTCharGetNonBlocking(base_);
if (data >= 0 && data <= 0xff)
if (nineBit_)
{
unsigned char c = data;
if (rxBuf->put(&c, 1) == 0)
if (rxBuf->space() < 2)
{
overrunCount++;
++overrunCount;
}
else
{
// parity error bit is moved to the ninth bit, then two bytes
// are written to the buffer.
long bit9 = (data & 0x200) >> 1;
data &= 0xff;
data |= bit9;
rxBuf->put((uint8_t *)&data, 2);
rxBuf->signal_condition_from_isr();
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Same here.

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fixed

}
}
else if (data >= 0 && data <= 0xff)
{
if (rxBuf->space() < 1)
{
++overrunCount;
}
else
{
unsigned char c = data;
rxBuf->put(&c, 1);
rxBuf->signal_condition_from_isr();
}
rxBuf->signal_condition_from_isr();
}
}
/* transmit a character if we have pending tx data */
Expand Down Expand Up @@ -302,6 +324,13 @@ int TivaUart::ioctl(File *file, unsigned long int key, unsigned long data)
uartMode_ |= UART_CONFIG_PAR_ONE;
MAP_UARTParityModeSet(base_, UART_CONFIG_PAR_ONE);
break;
case TCNINEBITRX:
nineBit_ = data != 0;
if (!nineBit_)
{
break;
}
// fall through
case TCPARZERO:
uartMode_ &= ~UART_CONFIG_PAR_MASK;
uartMode_ |= UART_CONFIG_PAR_ZERO;
Expand Down
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