update(guests/zephyr): update zephyr to version 3.5.0-rc1

In addition to version update for zephyr, also specify the commit for cmsis. Signed-off-by: Yan-Jie Wang <[email protected]>
bao-project · Oct 3, 2023 · 379028e · 379028e
1 parent e06a96d
commit 379028e
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diff --git a/guests/zephyr/boards/arm64/baovm_fvp-a/baovm_fvp-a.dts b/guests/zephyr/boards/arm64/baovm_fvp-a/baovm_fvp-a.dts
@@ -74,7 +74,7 @@
 		interrupt-parent = <&gic>;
 
 		gic: interrupt-controller@2f000000 {
-			compatible = "arm,gic";
+			compatible = "arm,gic-v3", "arm,gic";
 			reg = <0x2f000000 0x10000>, // GICD
 			      <0x2f100000 0x200000>; // GICR
 			interrupt-controller;

diff --git a/guests/zephyr/boards/arm64/baovm_fvp-r/baovm_fvp-r.dts b/guests/zephyr/boards/arm64/baovm_fvp-r/baovm_fvp-r.dts
@@ -77,7 +77,7 @@
     	interrupt-parent = <&gic>;
 
 		gic: interrupt-controller@af000000 {
-			compatible = "arm,gic";
+			compatible = "arm,gic-v3", "arm,gic";
 			reg = <0xaf000000 0x10000>,
 			      <0xaf100000 0x200000>;
 			interrupt-controller;

diff --git a/guests/zephyr/boards/arm64/baovm_qemu-aarch64-virt/baovm_qemu-aarch64-virt.dts b/guests/zephyr/boards/arm64/baovm_qemu-aarch64-virt/baovm_qemu-aarch64-virt.dts
@@ -74,7 +74,7 @@
 		interrupt-parent = <&gic>;
 
 		gic: interrupt-controller@8000000 {
-			compatible = "arm,gic";
+			compatible = "arm,gic-v3", "arm,gic";
 			reg = <0x8000000 0x10000>, // GICD
 			      <0x80a0000 0x200000>; // GICR
 			interrupt-controller;

diff --git a/guests/zephyr/make.mk b/guests/zephyr/make.mk
@@ -1,8 +1,9 @@
 zephyr_src:=$(wrkdir_src)/zephyr
 zephyr_repo:=https://github.com/zephyrproject-rtos/zephyr.git
-zephyr_version:=v3.3.0
+zephyr_version:=v3.5.0-rc1
 zephyr_cmsis_repo:=https://github.com/zephyrproject-rtos/cmsis.git
 zephyr_cmsis_src:=$(wrkdir_src)/cmsis
+zephyr_cmsis_commit:=5a00331455dd74e31e80efa383a489faea0590e3
 zephyr_build:=$(wrkdir_demo_imgs)/zephyr_build
 zephyr_board_root:=$(bao_demos)/guests/zephyr
 zephyr_board:=baovm_$(PLATFORM)
@@ -20,6 +21,7 @@ zephyr_bin:=$(zephyr_build)/zephyr/zephyr.bin
 
 $(zephyr_cmsis_src):
 	git clone $(zephyr_cmsis_repo) $@
+	git -C $(zephyr_cmsis_src) checkout $(zephyr_cmsis_commit)
 
 $(zephyr_build): $(zephyr_src) $(zephyr_cmsis_src)
 	$(zephyr_env) cmake -DCMAKE_PREFIX_PATH=$(zephyr_src)/share/zephyr-package \

diff --git a/...3.3.0/0001-add-bao-ipcshmem-drivers.patch → ...0-rc1/0001-add-bao-ipcshmem-drivers.patch b/...3.3.0/0001-add-bao-ipcshmem-drivers.patch → ...0-rc1/0001-add-bao-ipcshmem-drivers.patch
@@ -1,7 +1,7 @@
-From cd6b2086227930794a6021dc295c92da5a70d638 Mon Sep 17 00:00:00 2001
+From a4d65f37962f78fc16cae500e4a685fc1752255e Mon Sep 17 00:00:00 2001
 From: Jose Martins <[email protected]>
 Date: Sat, 4 Feb 2023 16:54:22 +0000
-Subject: [PATCH] add bao ipcshmem drivers
+Subject: [PATCH 1/3] add bao ipcshmem drivers
 
 Signed-off-by: Jose Martins <[email protected]>
 ---
@@ -20,18 +20,18 @@ Signed-off-by: Jose Martins <[email protected]>
  create mode 100644 include/zephyr/drivers/virtualization/bao_ipcshmem.h
 
 diff --git a/drivers/virtualization/CMakeLists.txt b/drivers/virtualization/CMakeLists.txt
-index 2829e641..8e65cbd7 100644
+index c16ed84e31..6150c91e69 100644
 --- a/drivers/virtualization/CMakeLists.txt
 +++ b/drivers/virtualization/CMakeLists.txt
-@@ -6,3 +6,6 @@ zephyr_library_sources_ifdef(CONFIG_IVSHMEM		virt_ivshmem.c)
+@@ -10,3 +10,6 @@ zephyr_library_sources_ifdef(CONFIG_IVSHMEM		virt_ivshmem.c)
  zephyr_library_sources_ifdef(CONFIG_IVSHMEM_SHELL	virt_ivshmem_shell.c)
 
  zephyr_library_sources_ifdef(CONFIG_USERSPACE		virt_ivshmem_handlers.c)
 +
 +zephyr_library_sources_ifdef(CONFIG_BAO_IPCSHMEM     bao_ipcshmem.c)
 +zephyr_library_sources_ifdef(CONFIG_BAO_IPCSHMEM_SHELL bao_ipcshmem_shell.c)
 diff --git a/drivers/virtualization/Kconfig b/drivers/virtualization/Kconfig
-index a5ac6820..fc9b4a68 100644
+index 4f32552f09..a0dac412e1 100644
 --- a/drivers/virtualization/Kconfig
 +++ b/drivers/virtualization/Kconfig
 @@ -12,6 +12,23 @@ menuconfig VIRTUALIZATION
@@ -60,7 +60,7 @@ index a5ac6820..fc9b4a68 100644
  	depends on PCIE
 diff --git a/drivers/virtualization/bao_ipcshmem.c b/drivers/virtualization/bao_ipcshmem.c
 new file mode 100644
-index 00000000..a323cf0c
+index 0000000000..a323cf0ca5
 --- /dev/null
 +++ b/drivers/virtualization/bao_ipcshmem.c
 @@ -0,0 +1,108 @@
@@ -174,7 +174,7 @@ index 00000000..a323cf0c
 +DT_INST_FOREACH_STATUS_OKAY(BAO_IPCSHMEM_INSTANTIATE)
 diff --git a/drivers/virtualization/bao_ipcshmem_internal.h b/drivers/virtualization/bao_ipcshmem_internal.h
 new file mode 100644
-index 00000000..f3292812
+index 0000000000..f32928126e
 --- /dev/null
 +++ b/drivers/virtualization/bao_ipcshmem_internal.h
 @@ -0,0 +1,28 @@
@@ -208,7 +208,7 @@ index 00000000..f3292812
 +#endif /* BAO_IPCSHMEM_INTERNAL_H_ */
 diff --git a/drivers/virtualization/bao_ipcshmem_shell.c b/drivers/virtualization/bao_ipcshmem_shell.c
 new file mode 100644
-index 00000000..9bb5c73e
+index 0000000000..9bb5c73e86
 --- /dev/null
 +++ b/drivers/virtualization/bao_ipcshmem_shell.c
 @@ -0,0 +1,97 @@
@@ -311,7 +311,7 @@ index 00000000..9bb5c73e
 +		   "Bao IPC Shared Memory Commands", NULL);
 diff --git a/dts/bindings/virtualization/bao,ipcshmem.yaml b/dts/bindings/virtualization/bao,ipcshmem.yaml
 new file mode 100644
-index 00000000..ed7cedef
+index 0000000000..ed7cedef9a
 --- /dev/null
 +++ b/dts/bindings/virtualization/bao,ipcshmem.yaml
 @@ -0,0 +1,15 @@
@@ -332,7 +332,7 @@ index 00000000..ed7cedef
 +    type: int
 diff --git a/include/zephyr/drivers/virtualization/bao_ipcshmem.h b/include/zephyr/drivers/virtualization/bao_ipcshmem.h
 new file mode 100644
-index 00000000..5f6e6fe9
+index 0000000000..5f6e6fe957
 --- /dev/null
 +++ b/include/zephyr/drivers/virtualization/bao_ipcshmem.h
 @@ -0,0 +1,46 @@

diff --git a/.../0001-add-smc-support-for-aarch32-r.patch → .../0002-add-smc-support-for-aarch32-r.patch b/.../0001-add-smc-support-for-aarch32-r.patch → .../0002-add-smc-support-for-aarch32-r.patch
@@ -1,32 +1,32 @@
-From 6e8232b9462de3a950a56a51d8718ac60c2fce0f Mon Sep 17 00:00:00 2001
+From 6cd91f065de146eef0f0f6a138ee8af1caac9aab Mon Sep 17 00:00:00 2001
 From: Jose Martins <[email protected]>
 Date: Mon, 6 Feb 2023 19:20:41 +0000
-Subject: [PATCH] add smc support for aarch32-r
+Subject: [PATCH 2/3] add smc support for aarch32-r
 
 Signed-off-by: Jose Martins <[email protected]>
 ---
- .../core/aarch32/cortex_a_r/CMakeLists.txt    |  1 +
- arch/arm/core/aarch32/cortex_a_r/Kconfig      |  7 +++
- arch/arm/core/aarch32/cortex_a_r/smccc-call.S | 41 +++++++++++++++
- include/zephyr/arch/arm/aarch32/arm-smccc.h   | 51 +++++++++++++++++++
+ arch/arm/core/cortex_a_r/CMakeLists.txt |  1 +
+ arch/arm/core/cortex_a_r/Kconfig        |  7 ++++
+ arch/arm/core/cortex_a_r/smccc-call.S   | 41 ++++++++++++++++++++
+ include/zephyr/arch/arm/arm-smccc.h     | 51 +++++++++++++++++++++++++
  4 files changed, 100 insertions(+)
- create mode 100644 arch/arm/core/aarch32/cortex_a_r/smccc-call.S
- create mode 100644 include/zephyr/arch/arm/aarch32/arm-smccc.h
+ create mode 100644 arch/arm/core/cortex_a_r/smccc-call.S
+ create mode 100644 include/zephyr/arch/arm/arm-smccc.h
 
-diff --git a/arch/arm/core/aarch32/cortex_a_r/CMakeLists.txt b/arch/arm/core/aarch32/cortex_a_r/CMakeLists.txt
-index d3337a67..878800f4 100644
---- a/arch/arm/core/aarch32/cortex_a_r/CMakeLists.txt
-+++ b/arch/arm/core/aarch32/cortex_a_r/CMakeLists.txt
-@@ -17,3 +17,4 @@ zephyr_library_sources(
- zephyr_library_sources_ifdef(CONFIG_USERSPACE thread.c)
+diff --git a/arch/arm/core/cortex_a_r/CMakeLists.txt b/arch/arm/core/cortex_a_r/CMakeLists.txt
+index 8b0dac374e..78271d9a2a 100644
+--- a/arch/arm/core/cortex_a_r/CMakeLists.txt
++++ b/arch/arm/core/cortex_a_r/CMakeLists.txt
+@@ -25,3 +25,4 @@ zephyr_library_sources_ifdef(CONFIG_USERSPACE thread.c)
  zephyr_library_sources_ifdef(CONFIG_SEMIHOST semihost.c)
  zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE __aeabi_read_tp.S)
+ zephyr_library_sources_ifdef(CONFIG_ARCH_CACHE cache.c)
 +zephyr_library_sources_ifdef(CONFIG_HAS_ARM_SMCCC smccc-call.S)
-diff --git a/arch/arm/core/aarch32/cortex_a_r/Kconfig b/arch/arm/core/aarch32/cortex_a_r/Kconfig
-index 418aa9a0..c9b52a22 100644
---- a/arch/arm/core/aarch32/cortex_a_r/Kconfig
-+++ b/arch/arm/core/aarch32/cortex_a_r/Kconfig
-@@ -126,9 +126,16 @@ config ARMV7_R_FP
+diff --git a/arch/arm/core/cortex_a_r/Kconfig b/arch/arm/core/cortex_a_r/Kconfig
+index 10bf721a87..c43a6e586d 100644
+--- a/arch/arm/core/cortex_a_r/Kconfig
++++ b/arch/arm/core/cortex_a_r/Kconfig
+@@ -127,9 +127,16 @@ config ARMV7_R_FP
  	  This option signifies the use of an ARMv7-R processor
  	  implementation supporting the Floating-Point Extension.
 
@@ -43,11 +43,11 @@ index 418aa9a0..c9b52a22 100644
  	help
  	  This option signifies the use of an ARMv8-R AArch32 processor
  	  implementation.
-diff --git a/arch/arm/core/aarch32/cortex_a_r/smccc-call.S b/arch/arm/core/aarch32/cortex_a_r/smccc-call.S
+diff --git a/arch/arm/core/cortex_a_r/smccc-call.S b/arch/arm/core/cortex_a_r/smccc-call.S
 new file mode 100644
-index 00000000..f655def9
+index 0000000000..f655def9b2
 --- /dev/null
-+++ b/arch/arm/core/aarch32/cortex_a_r/smccc-call.S
++++ b/arch/arm/core/cortex_a_r/smccc-call.S
 @@ -0,0 +1,41 @@
 +/*
 + * Copyright (c) 2019 Carlo Caione <[email protected]>
@@ -90,11 +90,11 @@ index 00000000..f655def9
 +GTEXT(arm_smccc_hvc)
 +SECTION_FUNC(TEXT, arm_smccc_hvc)
 +	SMCCC	hvc
-diff --git a/include/zephyr/arch/arm/aarch32/arm-smccc.h b/include/zephyr/arch/arm/aarch32/arm-smccc.h
+diff --git a/include/zephyr/arch/arm/arm-smccc.h b/include/zephyr/arch/arm/arm-smccc.h
 new file mode 100644
-index 00000000..e702ce22
+index 0000000000..e702ce2280
 --- /dev/null
-+++ b/include/zephyr/arch/arm/aarch32/arm-smccc.h
++++ b/include/zephyr/arch/arm/arm-smccc.h
 @@ -0,0 +1,51 @@
 +/*
 + * Copyright 2020 Carlo Caione <[email protected]>

diff --git a/...1-enable-shared-caches-for-cortex-r.patch → ...3-enable-shared-caches-for-cortex-r.patch b/...1-enable-shared-caches-for-cortex-r.patch → ...3-enable-shared-caches-for-cortex-r.patch
@@ -1,21 +1,21 @@
-From 0f73c6a91dc4c48bacf6a250f16af614613ad710 Mon Sep 17 00:00:00 2001
+From fb967bccb79a5e92a065a0c3ef366b127d502297 Mon Sep 17 00:00:00 2001
 From: Jose Martins <[email protected]>
 Date: Sat, 1 Apr 2023 21:23:31 +0100
-Subject: [PATCH 1/2] enable shared caches for cortex-r
+Subject: [PATCH 3/3] enable shared caches for cortex-r
 
 Signed-off-by: Jose Martins <[email protected]>
 ---
- arch/arm/core/aarch32/mpu/arm_mpu.c              | 2 +-
- arch/arm64/core/cortex_r/arm_mpu.c               | 2 +-
- include/zephyr/arch/arm/aarch32/mpu/arm_mpu_v8.h | 8 ++++----
- include/zephyr/arch/arm64/cortex_r/arm_mpu.h     | 6 +++---
- 4 files changed, 9 insertions(+), 9 deletions(-)
+ arch/arm/core/mpu/arm_mpu.c                  | 2 +-
+ arch/arm64/core/cortex_r/arm_mpu.c           | 2 +-
+ include/zephyr/arch/arm/mpu/arm_mpu_v8.h     | 8 ++++----
+ include/zephyr/arch/arm64/cortex_r/arm_mpu.h | 2 +-
+ 4 files changed, 7 insertions(+), 7 deletions(-)
 
-diff --git a/arch/arm/core/aarch32/mpu/arm_mpu.c b/arch/arm/core/aarch32/mpu/arm_mpu.c
-index f41f497e..b9469375 100644
---- a/arch/arm/core/aarch32/mpu/arm_mpu.c
-+++ b/arch/arm/core/aarch32/mpu/arm_mpu.c
-@@ -147,7 +147,7 @@ void arm_core_mpu_enable(void)
+diff --git a/arch/arm/core/mpu/arm_mpu.c b/arch/arm/core/mpu/arm_mpu.c
+index 9b2feffe5e..d49a7b6306 100644
+--- a/arch/arm/core/mpu/arm_mpu.c
++++ b/arch/arm/core/mpu/arm_mpu.c
+@@ -230,7 +230,7 @@ void arm_core_mpu_enable(void)
  	uint32_t val;
 
  	val = __get_SCTLR();
@@ -25,23 +25,23 @@ index f41f497e..b9469375 100644
 
  	/* Make sure that all the registers are set before proceeding */
 diff --git a/arch/arm64/core/cortex_r/arm_mpu.c b/arch/arm64/core/cortex_r/arm_mpu.c
-index 58b7dcd1..7371e804 100644
+index e303a7c037..c0d2395590 100644
 --- a/arch/arm64/core/cortex_r/arm_mpu.c
 +++ b/arch/arm64/core/cortex_r/arm_mpu.c
-@@ -73,7 +73,7 @@ void arm_core_mpu_enable(void)
+@@ -96,7 +96,7 @@ FUNC_NO_STACK_PROTECTOR void arm_core_mpu_enable(void)
  	uint64_t val;
 
  	val = read_sctlr_el1();
 -	val |= SCTLR_M_BIT;
 +	val |= SCTLR_M_BIT | SCTLR_C_BIT | SCTLR_I_BIT;
  	write_sctlr_el1(val);
- 	dsb();
- 	isb();
-diff --git a/include/zephyr/arch/arm/aarch32/mpu/arm_mpu_v8.h b/include/zephyr/arch/arm/aarch32/mpu/arm_mpu_v8.h
-index 67a5a365..59ebf4fc 100644
---- a/include/zephyr/arch/arm/aarch32/mpu/arm_mpu_v8.h
-+++ b/include/zephyr/arch/arm/aarch32/mpu/arm_mpu_v8.h
-@@ -191,7 +191,7 @@
+ 	barrier_dsync_fence_full();
+ 	barrier_isync_fence_full();
+diff --git a/include/zephyr/arch/arm/mpu/arm_mpu_v8.h b/include/zephyr/arch/arm/mpu/arm_mpu_v8.h
+index cf60cca99d..f797ab6682 100644
+--- a/include/zephyr/arch/arm/mpu/arm_mpu_v8.h
++++ b/include/zephyr/arch/arm/mpu/arm_mpu_v8.h
+@@ -198,7 +198,7 @@
  #define REGION_RAM_ATTR(limit)						    \
  	{								    \
  		.rbar = NOT_EXEC |					    \
@@ -50,7 +50,7 @@ index 67a5a365..59ebf4fc 100644
  		/* Cache-ability */					    \
  		.mair_idx = MPU_MAIR_INDEX_SRAM,			    \
  		.r_limit = limit - 1,  /* Region Limit */		    \
-@@ -199,7 +199,7 @@
+@@ -206,7 +206,7 @@
 
  #define REGION_RAM_TEXT_ATTR(limit)					    \
  	{								    \
@@ -59,7 +59,7 @@ index 67a5a365..59ebf4fc 100644
  		/* Cache-ability */					    \
  		.mair_idx = MPU_MAIR_INDEX_SRAM,			    \
  		.r_limit = limit - 1,  /* Region Limit */		    \
-@@ -208,7 +208,7 @@
+@@ -215,7 +215,7 @@
  #define REGION_RAM_RO_ATTR(limit)					    \
  	{								    \
  		.rbar = NOT_EXEC |					    \
@@ -68,45 +68,27 @@ index 67a5a365..59ebf4fc 100644
  		/* Cache-ability */					    \
  		.mair_idx = MPU_MAIR_INDEX_SRAM,			    \
  		.r_limit = limit - 1,  /* Region Limit */		    \
-@@ -248,7 +248,7 @@
+@@ -266,7 +266,7 @@
  #define REGION_RAM_ATTR(base, size) \
  	{\
- 		.rbar = NOT_EXEC | \
+ 		.rbar = IF_ENABLED(CONFIG_XIP, (NOT_EXEC |)) \
 -			P_RW_U_NA_Msk | NON_SHAREABLE_Msk, /* AP, XN, SH */ \
 +			P_RW_U_NA_Msk | INNER_SHAREABLE_Msk, /* AP, XN, SH */ \
  		/* Cache-ability */ \
  		.mair_idx = MPU_MAIR_INDEX_SRAM, \
  		.r_limit = REGION_LIMIT_ADDR(base, size),  /* Region Limit */ \
 diff --git a/include/zephyr/arch/arm64/cortex_r/arm_mpu.h b/include/zephyr/arch/arm64/cortex_r/arm_mpu.h
-index e3944a77..63b37871 100644
+index 8df9aaf15f..623d7f01b6 100644
 --- a/include/zephyr/arch/arm64/cortex_r/arm_mpu.h
 +++ b/include/zephyr/arch/arm64/cortex_r/arm_mpu.h
-@@ -143,7 +143,7 @@
- #define REGION_RAM_ATTR						      \
+@@ -151,7 +151,7 @@
+ #define REGION_RAM_NOCACHE_ATTR					      \
  	{							      \
  		/* AP, XN, SH */				      \
 -		.rbar = NOT_EXEC | P_RW_U_NA_Msk | NON_SHAREABLE_Msk, \
 +		.rbar = NOT_EXEC | P_RW_U_NA_Msk | INNER_SHAREABLE_Msk, \
  		/* Cache-ability */				      \
- 		.mair_idx = MPU_MAIR_INDEX_SRAM,		      \
- 	}
-@@ -151,7 +151,7 @@
- #define REGION_RAM_TEXT_ATTR				   \
- 	{						   \
- 		/* AP, XN, SH */			   \
--		.rbar = P_RO_U_RO_Msk | NON_SHAREABLE_Msk, \
-+		.rbar = P_RO_U_RO_Msk | INNER_SHAREABLE_Msk, \
- 		/* Cache-ability */			   \
- 		.mair_idx = MPU_MAIR_INDEX_SRAM,	   \
- 	}
-@@ -159,7 +159,7 @@
- #define REGION_RAM_RO_ATTR					      \
- 	{							      \
- 		/* AP, XN, SH */				      \
--		.rbar = NOT_EXEC | P_RO_U_RO_Msk | NON_SHAREABLE_Msk, \
-+		.rbar = NOT_EXEC | P_RO_U_RO_Msk | INNER_SHAREABLE_Msk  , \
- 		/* Cache-ability */				      \
- 		.mair_idx = MPU_MAIR_INDEX_SRAM,		      \
+ 		.mair_idx = MPU_MAIR_INDEX_SRAM_NOCACHE,	      \
  	}
 -- 
 2.34.1