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feat(ipc_interrupt): enable ipc delivery via interrupt in Linux #36

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@clachan clachan commented Jul 17, 2023

  • register ipc_message_handler to receive ipc notification in
    bao-ipcshmem driver
  • modify configs to define interrupt_offset in Linux VM
  • call bao_ipcshmem_notify in uart_rx_handler in Zephyr

On success, a message like below will appear in dmesg:

[ 12.881296] ipc message: freertos has received 1 uart interrupts!

Tested:

  • qemu-aarch64-virt
    • linux+freertos
    • linux+zephyr
  • rpi4
    • linux+freertos

@josecm
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josecm commented Jul 20, 2023

Thanks @clachan, this is great!

But first check my comment on your bao-project/bao-hypervisor#76 PR, as this seems to depend on it. Also I'd like to try this on qemu-riscv64. I think this Linux patch is pretty architecture independent no? So I'll try to add the hypercall on your bao-project/freertos-over-bao#6 PR, test it, and come back to this PR after the two other PRs are closed.

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josecm commented Jul 20, 2023

I've tested this on qemu-aarch64. As I told you in the "interrupts offset" PR, I had to fix the baoipc interrupt ID in the dts to 20. The original value is wrong. As we weren't using the interrupt in the linux side, we didn't caught it. So this PR will have to take that into account!

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josecm commented Jul 20, 2023

I've added the support for riscv in bao-project/freertos-over-bao#6, and seems to be working nice on qemu-riscv64!

@josecm josecm self-requested a review July 20, 2023 22:04
@josecm josecm self-assigned this Jul 20, 2023
@josecm josecm requested a review from DavidMCerdeira July 20, 2023 22:04
@clachan clachan force-pushed the ipc_interrupt branch 2 times, most recently from 0326756 to 3c177f1 Compare July 21, 2023 08:08
@clachan
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clachan commented Jul 21, 2023

I've reverted the interrupt_offset and corrected the dts files. Please review it again.

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clachan commented Jul 21, 2023

Hi @josecm,

There are a couple of linux.dts files, do you want me to modify the irq number in them all? I don't have other hardware boards to test, but I believe all should be corrected.

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josecm commented Jul 23, 2023

There are a couple of linux.dts files, do you want me to modify the irq number in them all? I don't have other hardware boards to test, but I believe all should be corrected.

Yes, please do. This should be fixed for all armv8 platforms..

- modify the irq number in Linux dts files to reflect the 32 offset
- implement and register ipc_message_handler to receive ipc notification
  in bao-ipcshmem driver
- call bao_ipcshmem_notify in uart_rx_handler in Zephyr
- modify irq number in all linux guest for ARM

On success, a message like below will appear in dmesg:

[   12.881296] ipc message: freertos has received 1 uart interrupts!

Tested:
- qemu-aarch64-virt
  - linux+freertos
  - linux+zephyr
- qemu-riscv-virt (by @josecm)
  - linux+freertos
- rpi4
  - linux+freertos

Signed-off-by: Clay Chang <[email protected]>
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clachan commented Jul 24, 2023

There are a couple of linux.dts files, do you want me to modify the irq number in them all? I don't have other hardware boards to test, but I believe all should be corrected.

Yes, please do. This should be fixed for all armv8 platforms..

Fixed in all Linux guests for ARM. Please review.

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josecm commented Jul 25, 2023

@clachan looks good, but I still need to test this for the aarch32 platforms (i.e. fvp). I'll try to find some time this week to push this through.

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clachan commented Oct 20, 2023

Hi @josecm, do you have update on this? Please let me know if anything I can help.

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josecm commented Oct 21, 2023

hey @clachan sorry for let this PR hanging. But I want to take time, I would need to test most platforms, to make sure your modifications are operational in all of them! Any other platform you are able to test it with would be great help. I'll ask people on our team to do it also.

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clachan commented Oct 22, 2023

@josecm, no worries. I am asking because I have developed a UIO-based interrupt mechanism based on the previous driver I want to share with the community. Thanks.

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