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Update zephyr to 3.5.0-rc1 and add support for linux+zephyr on rpi4 #46

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Oct 21, 2023
Merged

Update zephyr to 3.5.0-rc1 and add support for linux+zephyr on rpi4 #46

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880060d
update(guests/zephyr): update zephyr to version 3.5.0-rc1
yanjiew1 Oct 3, 2023
81d3909
Add support for linux+zephyr on rpi4
yanjiew1 Oct 3, 2023
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2 changes: 1 addition & 1 deletion README.md
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Original file line number Diff line number Diff line change
Expand Up @@ -260,7 +260,7 @@ Build the firmware and deploy the system according to the target platform:
| zcu104 | x | x | | |
| imx8qm | x | x | | |
| tx2 | x | x | | |
| rpi4 | x | x | | |
| rpi4 | x | x | x | |
| qemu-aarch64-virt | x | x | x | |
| fvp-a-aarch64 | x | x | x | x |
| fvp-a-aarch32 | x | x | x | x |
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131 changes: 131 additions & 0 deletions demos/linux+zephyr/configs/rpi4.c
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@@ -0,0 +1,131 @@
#include <config.h>

VM_IMAGE(linux_image, XSTR(BAO_DEMOS_WRKDIR_IMGS/linux.bin));
VM_IMAGE(zephyr_image, XSTR(BAO_DEMOS_WRKDIR_IMGS/zephyr.bin));

struct config config = {

.shmemlist_size = 1,
.shmemlist = (struct shmem[]) {
[0] = { .size = 0x00010000, }
},

.vmlist_size = 2,
.vmlist = {
{
.image = {
.base_addr = 0x20000000,
.load_addr = VM_IMAGE_OFFSET(linux_image),
.size = VM_IMAGE_SIZE(linux_image)
},

.entry = 0x20000000,

.platform = {
.cpu_num = 3,

.region_num = 1,
.regions = (struct vm_mem_region[]) {
{
.base = 0x20000000,
.size = 0x40000000,
.place_phys = true,
.phys = 0x20000000
}
},

.ipc_num = 1,
.ipcs = (struct ipc[]) {
{
.base = 0xf0000000,
.size = 0x00010000,
.shmem_id = 0,
.interrupt_num = 1,
.interrupts = (irqid_t[]) {52}
}
},

.dev_num = 2,
.devs = (struct vm_dev_region[]) {
{
/* GENET */
.pa = 0xfd580000,
.va = 0xfd580000,
.size = 0x10000,
.interrupt_num = 2,
.interrupts = (irqid_t[]) {189, 190}
},
{
/* Arch timer interrupt */
.interrupt_num = 1,
.interrupts =
(irqid_t[]) {27}
}
},

.arch = {
.gic = {
.gicd_addr = 0xff841000,
.gicc_addr = 0xff842000,
}
}
},
},
{
.image = {
.base_addr = 0x80000000,
.load_addr = VM_IMAGE_OFFSET(zephyr_image),
.size = VM_IMAGE_SIZE(zephyr_image)
},

.entry = 0x80000000,

.platform = {
.cpu_num = 1,

.region_num = 1,
.regions = (struct vm_mem_region[]) {
{
.base = 0x80000000,
.size = 0x8000000
}
},

.ipc_num = 1,
.ipcs = (struct ipc[]) {
{
.base = 0x70000000,
.size = 0x00004000,
.shmem_id = 0,
.interrupt_num = 1,
.interrupts = (irqid_t[]) {52}
}
},

.dev_num = 2,
.devs = (struct vm_dev_region[]) {
{
/* UART1 */
.pa = 0xfe215000,
.va = 0xfe215000,
.size = 0x1000,
.interrupt_num = 1,
.interrupts = (irqid_t[]) {125}
},
{
/* Arch timer interrupt */
.interrupt_num = 1,
.interrupts =
(irqid_t[]) {27}
}
},
.arch = {
.gic = {
.gicd_addr = 0xff841000,
.gicc_addr = 0xff842000,
}
}
},
},
},
};
2 changes: 1 addition & 1 deletion guests/zephyr/boards/arm64/baovm_fvp-a/baovm_fvp-a.dts
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Expand Up @@ -74,7 +74,7 @@
interrupt-parent = <&gic>;

gic: interrupt-controller@2f000000 {
compatible = "arm,gic";
compatible = "arm,gic-v3", "arm,gic";
reg = <0x2f000000 0x10000>, // GICD
<0x2f100000 0x200000>; // GICR
interrupt-controller;
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19 changes: 17 additions & 2 deletions guests/zephyr/boards/arm64/baovm_fvp-r/baovm_fvp-r.dts
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Expand Up @@ -8,6 +8,7 @@
// #include <arm64/fvp/fvp-aemv8r.dtsi>
#include <mem.h>
#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>

/ {
model = "Bao VM for FVP BaseR AEMv8R";
Expand Down Expand Up @@ -77,7 +78,7 @@
interrupt-parent = <&gic>;

gic: interrupt-controller@af000000 {
compatible = "arm,gic";
compatible = "arm,gic-v3", "arm,gic";
reg = <0xaf000000 0x10000>,
<0xaf100000 0x200000>;
interrupt-controller;
Expand All @@ -102,7 +103,21 @@

dram0: memory@24000000 {
compatible = "mmio-dram";
reg = <0x24000000 DT_SIZE_M((512*3)-64)>;
reg = <0x24000000 DT_SIZE_M(64)>;
};

baoipc_region: memory@70000000 {
compatible = "zephyr,memory-region";
reg = <0x70000000 0x00010000>;
zephyr,memory-region = "BAOIPC";
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
};

device_region: memory@9a000000 {
compatible = "zephyr,memory-region", "mmio-dram";
reg = <0x9a000000 0x66000000>;
zephyr,memory-region = "DEVICE_REGION";
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
};
};
};
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2 changes: 1 addition & 1 deletion guests/zephyr/boards/arm64/baovm_qemu-aarch64-virt/baovm_qemu-aarch64-virt.dts
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Expand Up @@ -74,7 +74,7 @@
interrupt-parent = <&gic>;

gic: interrupt-controller@8000000 {
compatible = "arm,gic";
compatible = "arm,gic-v3", "arm,gic";
reg = <0x8000000 0x10000>, // GICD
<0x80a0000 0x200000>; // GICR
interrupt-controller;
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8 changes: 8 additions & 0 deletions guests/zephyr/boards/arm64/baovm_rpi4/Kconfig.board
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# Copyright (c) 2019 Carlo Caione <[email protected]>
# Copyright (c) 2023 Yan-Jie Wang <[email protected]>
# SPDX-License-Identifier: Apache-2.0

config BOARD_RASPBERRY_PI_4B
bool "Raspberry Pi 4B"
depends on SOC_BCM2711
select ARM64
13 changes: 13 additions & 0 deletions guests/zephyr/boards/arm64/baovm_rpi4/Kconfig.defconfig
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# Copyright (c) 2019 Carlo Caione <[email protected]>
# Copyright (c) 2023 Yan-Jie Wang <[email protected]>
# SPDX-License-Identifier: Apache-2.0

if BOARD_RASPBERRY_PI_4B

config BUILD_OUTPUT_BIN
default y

config BOARD
default "raspberry_pi_4b"

endif # BOARD_RASPBERRY_PI_4B
95 changes: 95 additions & 0 deletions guests/zephyr/boards/arm64/baovm_rpi4/baovm_rpi4.dts
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@@ -0,0 +1,95 @@
/*
* Copyright (c) 2021 Carlo Caione <[email protected]>
* Copyright (c) 2023 Yan-Jie Wang <[email protected]>
* SPDX-License-Identifier: Apache-2.0
*/

/dts-v1/;

#include <mem.h>
#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>

/ {
model = "Bao Raspberry Pi 4 Model B";

#address-cells = <1>;
#size-cells = <1>;

aliases { };

chosen {
/*
* The SRAM node is actually located in the
* DRAM region of the FVP Base RevC 2xAEMv8A.
*/
zephyr,sram = &dram0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
};

psci {
compatible = "arm,psci-0.2";
method = "smc";
};

cpus {
#address-cells = <1>;
#size-cells = <0>;

cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0>;
};
};

timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>,
<GIC_PPI 14 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>,
<GIC_PPI 11 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>,
<GIC_PPI 10 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>;
};

soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges;
interrupt-parent = <&gic>;

gic: interrupt-controller@ff841000 {
compatible = "arm,gic-v2", "arm,gic";
reg = <0xff841000 0x1000>,
<0xff842000 0x2000>;
interrupt-controller;
#interrupt-cells = <4>;
status = "okay";
#address-cells = <1>;
#size-cells = <1>;
};

uart0: uart@fe215040 {
compatible = "brcm,bcm2711-aux-uart";
reg = <0xfe215040 0x40>;
clock-frequency = <500000000>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
status = "disabled";
};

dram0: memory@80000000 {
compatible = "mmio-sram";
reg = <0x80000000 DT_SIZE_M(128)>;
};
};
};

&uart0 {
status = "okay";
current-speed = <115200>;
};
12 changes: 12 additions & 0 deletions guests/zephyr/boards/arm64/baovm_rpi4/baovm_rpi4_defconfig
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CONFIG_SOC_BCM2711=y
CONFIG_BOARD_RASPBERRY_PI_4B=y

# Enable UART driver
CONFIG_SERIAL=y

# Enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y

# Enable serial port
CONFIG_UART_INTERRUPT_DRIVEN=y
4 changes: 3 additions & 1 deletion guests/zephyr/make.mk
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@@ -1,8 +1,9 @@
zephyr_src:=$(wrkdir_src)/zephyr
zephyr_repo:=https://github.com/zephyrproject-rtos/zephyr.git
zephyr_version:=v3.3.0
zephyr_version:=v3.5.0-rc1
zephyr_cmsis_repo:=https://github.com/zephyrproject-rtos/cmsis.git
zephyr_cmsis_src:=$(wrkdir_src)/cmsis
zephyr_cmsis_commit:=5a00331455dd74e31e80efa383a489faea0590e3
zephyr_build:=$(wrkdir_demo_imgs)/zephyr_build
zephyr_board_root:=$(bao_demos)/guests/zephyr
zephyr_board:=baovm_$(PLATFORM)
Expand All @@ -20,6 +21,7 @@ zephyr_bin:=$(zephyr_build)/zephyr/zephyr.bin

$(zephyr_cmsis_src):
git clone $(zephyr_cmsis_repo) $@
git -C $(zephyr_cmsis_src) checkout $(zephyr_cmsis_commit)

$(zephyr_build): $(zephyr_src) $(zephyr_cmsis_src)
$(zephyr_env) cmake -DCMAKE_PREFIX_PATH=$(zephyr_src)/share/zephyr-package \
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