Skip to content

Commit

Permalink
feat(verbose): improve error handling for interrupt reservation
Browse files Browse the repository at this point in the history
Signed-off-by: Diogo Costa <[email protected]>
  • Loading branch information
Diogo21Costa authored and josecm committed Oct 16, 2023
1 parent 4e8b045 commit 8459a8e
Show file tree
Hide file tree
Showing 5 changed files with 17 additions and 6 deletions.
6 changes: 4 additions & 2 deletions src/arch/armv8/gic.c
Original file line number Diff line number Diff line change
Expand Up @@ -68,8 +68,10 @@ void gicd_init()

/* No need to setup gicd->NSACR as all interrupts are setup to group 1 */

interrupts_reserve(platform.arch.gic.maintenance_id,
gic_maintenance_handler);
if(!interrupts_reserve(platform.arch.gic.maintenance_id,
gic_maintenance_handler)) {
ERROR("Failed to reserve GIC maintenance interrupt");
}
}

void gic_map_mmio();
Expand Down
5 changes: 4 additions & 1 deletion src/arch/riscv/iommu.c
Original file line number Diff line number Diff line change
Expand Up @@ -334,7 +334,10 @@ void rv_iommu_init(void)
rv_iommu.hw.reg_ptr->fqh = 0;

// Allocate IRQ for FQ
interrupts_reserve(platform.arch.iommu.fq_irq_id, rv_iommu_fq_irq_handler);
if(!interrupts_reserve(platform.arch.iommu.fq_irq_id, rv_iommu_fq_irq_handler)) {
ERROR("Failed to reserve IOMMU FQ interrupt");
}

interrupts_cpu_enable(platform.arch.iommu.fq_irq_id, true);

// Enable FQ (fqcsr)
Expand Down
4 changes: 3 additions & 1 deletion src/arch/riscv/sbi.c
Original file line number Diff line number Diff line change
Expand Up @@ -476,5 +476,7 @@ void sbi_init()
}
}

interrupts_reserve(TIMR_INT_ID, sbi_timer_irq_handler);
if(!interrupts_reserve(TIMR_INT_ID, sbi_timer_irq_handler)) {
ERROR("Failed to reserve SBI TIMR_INT_ID interrupt");
}
}
4 changes: 3 additions & 1 deletion src/core/interrupts.c
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,9 @@ inline void interrupts_init()
interrupts_arch_init();

if (cpu()->id == CPU_MASTER) {
interrupts_reserve(IPI_CPU_MSG, cpu_msg_handler);
if(!interrupts_reserve(IPI_CPU_MSG, cpu_msg_handler)) {
ERROR("Failed to reserve IPI_CPU_MSG interrupt");
}
}

interrupts_cpu_enable(IPI_CPU_MSG, true);
Expand Down
4 changes: 3 additions & 1 deletion src/core/vm.c
Original file line number Diff line number Diff line change
Expand Up @@ -207,7 +207,9 @@ static void vm_init_dev(struct vm* vm, const struct vm_config* config)
}

for (size_t j = 0; j < dev->interrupt_num; j++) {
interrupts_vm_assign(vm, dev->interrupts[j]);
if(!interrupts_vm_assign(vm, dev->interrupts[j])) {
ERROR("Failed to assign interrupt id %d", dev->interrupts[j]);
}
}
}

Expand Down

0 comments on commit 8459a8e

Please sign in to comment.