fix(verbose): improve error handling for interrupt reservation

Signed-off-by: Diogo Costa <[email protected]>
bao-project · Oct 9, 2023 · 878ad2b · 878ad2b
1 parent 1a898b4
commit 878ad2b
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Showing 4 changed files with 4 additions and 4 deletions.
diff --git a/src/arch/armv8/gic.c b/src/arch/armv8/gic.c
@@ -70,7 +70,7 @@ void gicd_init()
 
     if(!interrupts_reserve(platform.arch.gic.maintenance_id,
                        gic_maintenance_handler)) {
-        ERROR("Failed to assign GIC maintenance interrupt");
+        ERROR("Failed to reserve GIC maintenance interrupt");
     }
 }
 

diff --git a/src/arch/riscv/iommu.c b/src/arch/riscv/iommu.c
@@ -335,7 +335,7 @@ void rv_iommu_init(void)
 
     // Allocate IRQ for FQ
     if(!interrupts_reserve(platform.arch.iommu.fq_irq_id, rv_iommu_fq_irq_handler)) {
-        ERROR("Failed to assign IOMMU FQ interrupt");
+        ERROR("Failed to reserve IOMMU FQ interrupt");
     }
 
     interrupts_cpu_enable(platform.arch.iommu.fq_irq_id, true);

diff --git a/src/arch/riscv/sbi.c b/src/arch/riscv/sbi.c
@@ -477,6 +477,6 @@ void sbi_init()
     }
 
     if(!interrupts_reserve(TIMR_INT_ID, sbi_timer_irq_handler)) {
-        ERROR("Failed to assign SBI TIMR_INT_ID interrupt");
+        ERROR("Failed to reserve SBI TIMR_INT_ID interrupt");
     }
 }
diff --git a/src/core/interrupts.c b/src/core/interrupts.c
@@ -42,7 +42,7 @@ inline void interrupts_init()
 
     if (cpu()->id == CPU_MASTER) {
         if(!interrupts_reserve(IPI_CPU_MSG, cpu_msg_handler)) {
-            ERROR("Failed to assign IPI_CPU_MSG interrupt");
+            ERROR("Failed to reserve IPI_CPU_MSG interrupt");
         }
     }