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Reg bank patch (accel-sim#41)
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* remove implicit casting, cleanup unused bank_warp_shift parameter

* update cu init function prototype

* remove m_bank_warp_shift from function call
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@barnes88
barnes88 authored Jul 12, 2024
1 parent 6aa7ed1 commit 55419d7
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Showing 2 changed files with 16 additions and 23 deletions.
22 changes: 9 additions & 13 deletions src/gpgpu-sim/shader.cc
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4138,10 +4138,7 @@ void opndcoll_rfu_t::init(unsigned num_banks, shader_core_ctx *shader) {
// for( unsigned n=0; n<m_num_ports;n++ )
// m_dispatch_units[m_output[n]].init( m_num_collector_units[n] );
m_num_banks = num_banks;
m_bank_warp_shift = 0;
m_warp_size = shader->get_config()->warp_size;
m_bank_warp_shift = (unsigned)(int)(log(m_warp_size + 0.5) / log(2.0));
assert((m_bank_warp_shift == 5) || (m_warp_size != 32));

sub_core_model = shader->get_config()->sub_core_model;
m_num_warp_scheds = shader->get_config()->gpgpu_num_sched_per_core;
Expand All @@ -4159,7 +4156,7 @@ void opndcoll_rfu_t::init(unsigned num_banks, shader_core_ctx *shader) {
unsigned cusPerSched = m_cu.size() / m_num_warp_scheds;
reg_id = j / cusPerSched;
}
m_cu[j]->init(j, num_banks, m_bank_warp_shift, shader->get_config(), this,
m_cu[j]->init(j, num_banks, shader->get_config(), this,
sub_core_model, reg_id, m_num_banks_per_sched);
}
for (unsigned j = 0; j < m_dispatch_units.size(); j++) {
Expand All @@ -4168,11 +4165,11 @@ void opndcoll_rfu_t::init(unsigned num_banks, shader_core_ctx *shader) {
m_initialized = true;
}

int register_bank(int regnum, int wid, unsigned num_banks,
unsigned bank_warp_shift, bool sub_core_model,
unsigned register_bank(int regnum, int wid, unsigned num_banks,
bool sub_core_model,
unsigned banks_per_sched, unsigned sched_id) {
int bank = regnum;
if (bank_warp_shift) bank += wid;
bank += wid;
if (sub_core_model) {
unsigned bank_num = (bank % banks_per_sched) + (sched_id * banks_per_sched);
assert(bank_num < num_banks);
Expand All @@ -4190,12 +4187,12 @@ bool opndcoll_rfu_t::writeback(warp_inst_t &inst) {
// in function_info::ptx_decode_inst
if (reg_num >= 0) { // valid register
unsigned bank = register_bank(reg_num, inst.warp_id(), m_num_banks,
m_bank_warp_shift, sub_core_model,
sub_core_model,
m_num_banks_per_sched, inst.get_schd_id());
if (m_arbiter.bank_idle(bank)) {
m_arbiter.allocate_bank_for_write(
bank,
op_t(&inst, reg_num, m_num_banks, m_bank_warp_shift, sub_core_model,
op_t(&inst, reg_num, m_num_banks, sub_core_model,
m_num_banks_per_sched, inst.get_schd_id()));
inst.arch_reg.dst[op] = -1;
} else {
Expand Down Expand Up @@ -4305,7 +4302,7 @@ void opndcoll_rfu_t::allocate_reads() {
unsigned reg = rr.get_reg();
unsigned wid = rr.get_wid();
unsigned bank =
register_bank(reg, wid, m_num_banks, m_bank_warp_shift, sub_core_model,
register_bank(reg, wid, m_num_banks, sub_core_model,
m_num_banks_per_sched, rr.get_sid());
m_arbiter.allocate_for_read(bank, rr);
read_ops[bank] = rr;
Expand Down Expand Up @@ -4357,15 +4354,14 @@ void opndcoll_rfu_t::collector_unit_t::dump(
}

void opndcoll_rfu_t::collector_unit_t::init(
unsigned n, unsigned num_banks, unsigned log2_warp_size,
unsigned n, unsigned num_banks,
const core_config *config, opndcoll_rfu_t *rfu, bool sub_core_model,
unsigned reg_id, unsigned banks_per_sched) {
m_rfu = rfu;
m_cuid = n;
m_num_banks = num_banks;
assert(m_warp == NULL);
m_warp = new warp_inst_t(config);
m_bank_warp_shift = log2_warp_size;
m_sub_core_model = sub_core_model;
m_reg_id = reg_id;
m_num_banks_per_sched = banks_per_sched;
Expand Down Expand Up @@ -4393,7 +4389,7 @@ bool opndcoll_rfu_t::collector_unit_t::allocate(register_set *pipeline_reg_set,
}
if (reg_num >= 0 && new_reg) { // valid register
prev_regs.push_back(reg_num);
m_src_op[op] = op_t(this, op, reg_num, m_num_banks, m_bank_warp_shift,
m_src_op[op] = op_t(this, op, reg_num, m_num_banks,
m_sub_core_model, m_num_banks_per_sched,
(*pipeline_reg)->get_schd_id());
m_not_ready.set(op);
Expand Down
17 changes: 7 additions & 10 deletions src/gpgpu-sim/shader.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -336,8 +336,8 @@ inline unsigned wid_from_hw_tid(unsigned tid, unsigned warp_size) {
const unsigned WARP_PER_CTA_MAX = 64;
typedef std::bitset<WARP_PER_CTA_MAX> warp_set_t;

int register_bank(int regnum, int wid, unsigned num_banks,
unsigned bank_warp_shift, bool sub_core_model,
unsigned register_bank(int regnum, int wid, unsigned num_banks,
bool sub_core_model,
unsigned banks_per_sched, unsigned sched_id);

class shader_core_ctx;
Expand Down Expand Up @@ -681,27 +681,27 @@ class opndcoll_rfu_t { // operand collector based register file unit
public:
op_t() { m_valid = false; }
op_t(collector_unit_t *cu, unsigned op, unsigned reg, unsigned num_banks,
unsigned bank_warp_shift, bool sub_core_model,
bool sub_core_model,
unsigned banks_per_sched, unsigned sched_id) {
m_valid = true;
m_warp = NULL;
m_cu = cu;
m_operand = op;
m_register = reg;
m_shced_id = sched_id;
m_bank = register_bank(reg, cu->get_warp_id(), num_banks, bank_warp_shift,
m_bank = register_bank(reg, cu->get_warp_id(), num_banks,
sub_core_model, banks_per_sched, sched_id);
}
op_t(const warp_inst_t *warp, unsigned reg, unsigned num_banks,
unsigned bank_warp_shift, bool sub_core_model,
bool sub_core_model,
unsigned banks_per_sched, unsigned sched_id) {
m_valid = true;
m_warp = warp;
m_register = reg;
m_cu = NULL;
m_operand = -1;
m_shced_id = sched_id;
m_bank = register_bank(reg, warp->warp_id(), num_banks, bank_warp_shift,
m_bank = register_bank(reg, warp->warp_id(), num_banks,
sub_core_model, banks_per_sched, sched_id);
}

Expand Down Expand Up @@ -934,7 +934,6 @@ class opndcoll_rfu_t { // operand collector based register file unit
m_not_ready.reset();
m_warp_id = -1;
m_num_banks = 0;
m_bank_warp_shift = 0;
}
// accessors
bool ready() const;
Expand All @@ -951,7 +950,7 @@ class opndcoll_rfu_t { // operand collector based register file unit
unsigned get_reg_id() const { return m_reg_id; }

// modifiers
void init(unsigned n, unsigned num_banks, unsigned log2_warp_size,
void init(unsigned n, unsigned num_banks,
const core_config *config, opndcoll_rfu_t *rfu,
bool m_sub_core_model, unsigned reg_id,
unsigned num_banks_per_sched);
Expand All @@ -973,7 +972,6 @@ class opndcoll_rfu_t { // operand collector based register file unit
op_t *m_src_op;
std::bitset<MAX_REG_OPERANDS * 2> m_not_ready;
unsigned m_num_banks;
unsigned m_bank_warp_shift;
opndcoll_rfu_t *m_rfu;

unsigned m_num_banks_per_sched;
Expand Down Expand Up @@ -1025,7 +1023,6 @@ class opndcoll_rfu_t { // operand collector based register file unit
unsigned m_num_collector_sets;
// unsigned m_num_collectors;
unsigned m_num_banks;
unsigned m_bank_warp_shift;
unsigned m_warp_size;
std::vector<collector_unit_t *> m_cu;
arbiter_t m_arbiter;
Expand Down

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