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Pull requests: bespoke-silicon-group/basejump_stl
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Removing BSG_ABSTRACT_MODULE from gf14 clk gen netlist modules
#716
by stdavids
was merged Feb 8, 2025
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Review required
Hotfix: verilog includes
bug
Something isn't working
#710
by dpetrisko
was merged Nov 25, 2024
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Creating 2019.1 subdirectory for ultrascale bsg_mem
enhancement
New feature or request
#709
by dpetrisko
was merged Nov 25, 2024
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Naming abstract gen block
clarity
Code readability or documentation issues
#702
by dpetrisko
was merged Dec 29, 2024
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Harden Xilinx memories
enhancement
New feature or request
#681
by dpetrisko
was merged Jun 21, 2024
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Update bsg_defines.sv for yosys
bug
Something isn't working
#677
by dpetrisko
was merged Mar 28, 2024
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bsg_dmc/bsg_dmc_dly_line_v3.sv: Fix missing include
#676
by infinitymdm
was merged Mar 11, 2024
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bsg_mem/bsg_mem_1rw_sync_mask_write_bit_from_1r1w.sv: Fix variable order
#675
by infinitymdm
was merged Mar 11, 2024
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bsg_dataflow/bsg_fifo_bypass.sv: Fix incorrect port name
#673
by infinitymdm
was merged Mar 2, 2024
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Rename bsg_decode_thermometer
clarity
Code readability or documentation issues
#670
by dpetrisko
was merged Aug 30, 2024
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Update ascii to rom to work with python 2/3
bug
Something isn't working
#669
by dpetrisko
was merged Jan 18, 2024
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Basejump 2.0
clarity
Code readability or documentation issues
enhancement
New feature or request
#666
by BrendenPage
was merged Nov 14, 2023
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fix the issue that max_val_p cannot be set to 2^n
#664
by RicoLi424
was closed Aug 30, 2024
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