Try something lol #7096
lmbollenci.yml
on: push
Build dependencies
3m 25s
bittide-instances hardware-in-the-loop test matrix generation
1m 11s
bittide-instances synthesis matrix generation
59s
bittide-experiments unittests
1m 52s
Bittide tests
7m 40s
Rust Lints
1m 35s
Firmware Support Unit Tests
3m 31s
Firmware Limit Checks
1m 39s
bittide-instances doctests
2m 16s
bittide-instances unittests
2m 41s
Matrix: synth
Matrix: HITL
All jobs finished
3s
Annotations
4 errors and 4 warnings
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bittide-instances unittests
Process completed with exit code 1.
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HITL (swCcOneTopologyTest, test)
Process completed with exit code 1.
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Generate clock control report
Process completed with exit code 1.
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All jobs finished
Process completed with exit code 1.
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HITL (linkConfigurationTest, test)
No files were found with the provided path: _build/vivado/*/ila-data
_build/hitl/*. No artifacts will be uploaded.
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HITL (transceiversUpTest, test)
No files were found with the provided path: _build/vivado/*/ila-data
_build/hitl/*. No artifacts will be uploaded.
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Generate clock control report
No files were found with the provided path: reports. No artifacts will be uploaded.
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Generate clock control report
No files were found with the provided path: plot-sources. No artifacts will be uploaded.
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Artifacts
Produced during runtime
| Name | Size | |
|---|---|---|
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_build-linkConfigurationTest
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12.1 MB |
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_build-safeDffSynchronizer
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2.59 KB |
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_build-swCcOneTopologyTest
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280 MB |
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_build-swCcOneTopologyTest-debug
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8.9 KB |
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_build-transceiversUpTest
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12.6 MB |
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_build-vexRiscvTcpTest
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44.8 MB |
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_build-vexRiscvTcpTest-debug
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97.6 KB |
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_build-vexRiscvTest
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40.7 MB |
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_build-vexRiscvTest-debug
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211 KB |
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