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(DROPME) Fix up debugging ILA
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rslawson committed Feb 20, 2025
1 parent 2bbb009 commit 9acd3ba
Showing 1 changed file with 60 additions and 5 deletions.
65 changes: 60 additions & 5 deletions bittide-instances/src/Bittide/Instances/Hitl/Demo.hs
Original file line number Diff line number Diff line change
Expand Up @@ -192,18 +192,32 @@ dut refClk refRst skyClk rxNs rxPs allProgrammed miso jtagIn =
( ilaConfig
$ "trigger_fdi"
:> "capture_fdi"
:> "handshakesCompleteFree"
:> "txStarts"
:> "rxReadys_ebReadysRx"
-- Important step 1 signals
:> "dd_spiDone"
:> "dd_spiErr"
-- Important step 2 signals
:> "dd_handshakesCompleteFree"
-- Important step 3 signals
:> "dd_txStarts"
-- Important step 4 signals
-- Important step 5 signals
:> "dd_allStable"
-- Important step 6 signals
:> "dd_ebReadys"
-- Other
:> "dd_transceiversFailedAfterUp"
:> Nil
)
{ depth = D16384
}
refClk
spiDone
(unsafeToActiveLow refRst)
captureFlag
spiDone
spiErr
(bundle transceivers.handshakesCompleteFree)
(bundle $ xpmCdcArraySingle bittideClk refClk <$> txStarts)
allStable
(bundle $ xpmCdcArraySingle bittideClk refClk <$> ebReadys)

captureFlag =
Expand Down Expand Up @@ -524,7 +538,7 @@ demoTest ::
, "JTAG" ::: Signal Basic125 JtagOut
)
demoTest boardClkDiff refClkDiff rxns rxps miso jtagIn =
(txns, txps, unbundle swFincFdecs, spiDone, spiOut, jtagOut)
hwSeqX testIla (txns, txps, unbundle swFincFdecs, spiDone, spiOut, jtagOut)
where
boardClk :: Clock Ext200
boardClk = ibufds_gte3 boardClkDiff
Expand Down Expand Up @@ -573,6 +587,47 @@ demoTest boardClkDiff refClkDiff rxns rxps miso jtagIn =

testSuccess :: Signal Basic125 Bool
testSuccess = allStable .&&. fifoSuccess .&&. fmap not transceiversFailedAfterUp

testIla :: Signal Basic125 ()
testIla =
setName @"demoTestIla"
ila
( ilaConfig
$ "trigger_fdi"
:> "capture_fdi"
:> "dt_handshakesDone"
:> "dt_swFincFdecs"
:> "dt_spiDone"
:> "dt_spiOut"
:> "dt_jtagOut"
:> "dt_transceiversFailedAfterUp"
:> "dt_allStable"
:> "dt_noFifoOverflows"
:> "dt_noFifoUnderflows"
:> Nil
)
{ depth = D16384
}
refClk
testStart
captureFlag
handshakesDone
swFincFdecs
spiDone
(bundle spiOut)
jtagOut
transceiversFailedAfterUp
allStable
noFifoOverflows
noFifoUnderflows

captureFlag :: Signal Basic125 Bool
captureFlag =
riseEvery
refClk
testReset
enableGen
(SNat @(PeriodToCycles Basic125 (Milliseconds 1)))
{-# OPAQUE demoTest #-}
makeTopEntity 'demoTest

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