Implement pause support for RISC-V

[XieJiSS]

see-also: https://github.com/torvalds/linux/blob/84186fcb834ecc55604efaf383e17e6b5e9baa50/arch/riscv/include/asm/vdso/processor.h#L9

[XieJiSS]

Note that there could be situations that the code is compiled with -march=..._zihintpause but get executed on a machine which does not support the hint. In such cases, pause (and .4byte 0x100000F) would be interpreted as fence w, 0. fence w, 0 is pause for Zihintpause and nop for other machines, so this will not cause SIGILL.

[Lastique]

Thank you.