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Final changes for BlackParrot integration #7

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2 changes: 1 addition & 1 deletion piton/design/chip/tile/blackparrot
Submodule blackparrot updated 551 files
3 changes: 3 additions & 0 deletions piton/design/xilinx/genesys2/constraints.xdc
Original file line number Diff line number Diff line change
Expand Up @@ -58,6 +58,9 @@ set_false_path -from [get_ports trst_ni]
set_max_delay -datapath_only -from [get_clocks -include_generated_clocks chipset_clk_clk_mmcm] -to [get_clocks tck_i] 15.000
set_max_delay -datapath_only -from [get_clocks tck_i] -to [get_clocks -include_generated_clocks chipset_clk_clk_mmcm] 15.000

# Retiming
set_property BLOCK_SYNTH.RETIMING 1 [get_cells -hierarchical *pipe_fma*]

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This didn't end up helping much, right? Should we keep this out and wait for the manually retimed FPU?

set_property -dict {PACKAGE_PIN Y29 IOSTANDARD LVCMOS33} [get_ports trst_ni]
set_property -dict {PACKAGE_PIN AD27 IOSTANDARD LVCMOS33} [get_ports tck_i]
set_property -dict {PACKAGE_PIN W27 IOSTANDARD LVCMOS33} [get_ports td_i]
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1 change: 1 addition & 0 deletions piton/tools/bin/rv64_img
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Expand Up @@ -27,6 +27,7 @@
# create mem.image
#riscv64-unknown-elf-objcopy --reverse-bytes 4 -I elf32-littleriscv -O binary diag.exe diag.o
${RV64_TARGET_TRIPLE}-objcopy -I elf64-littleriscv -O binary diag.exe diag.o
cp diag.exe prog.elf

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What is this for?

# pad with zero to 128byte boundary
du diag.o -b | awk '{print(128 - ($1 % 128));}' | xargs -t -ISIZE truncate diag.o -s +SIZE
printf "\n@0000000080000000\t// Section '.RED_SEC', segment 'text'\n" >mem.image
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2 changes: 1 addition & 1 deletion piton/tools/src/proto/block.list
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Expand Up @@ -25,7 +25,7 @@
# Format:
# BlockID BlockPath Supported Board,Frequency(MHz),DDRSize(Mbytes)
piton_aws ../../build/f1/piton_aws/design f1,62.5,4096
system . vc707,60,1024;genesys2,66.667,1024;nexysVideo,30,512;vcu118,100,2048;xupp3r,60,32768
system . vc707,60,1024;genesys2,25,1024;nexysVideo,30,512;vcu118,100,2048;xupp3r,60,32768

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Still not excited about this - do we have a sense of the manually retimed FPU's timing?

chipset chipset genesys2,66.667,1024;piton_board,50,0
passthru passthru piton_board,100,0
passthru_loopback fpga_tests/passthru_loopback piton_board,100,0
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1,300 changes: 846 additions & 454 deletions piton/tools/src/proto/common/blackparrot.tcl

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4 changes: 4 additions & 0 deletions piton/tools/src/sims/sims,2.0
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Expand Up @@ -2676,6 +2676,7 @@ sub parse_args
'gui!',
'log_all!',
'debug_all!',
'debug_pp!',

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What is this one vs debug_all? Can you just use it via -vcs_build_args=-debug_pp rather than adding a new flag?

'ibm!',
'ed_enable!',
'ed_sync_method=s',
Expand Down Expand Up @@ -2900,6 +2901,9 @@ sub parse_args
#
push (@{$opt{sim_run_args}}, "-gui") if ($opt{gui}) ;
push (@{$opt{vcs_build_args}}, "-debug_all") if ($opt{debug_all}) ;
push (@{$opt{vcs_build_args}}, "-debug_pp") if ($opt{debug_pp}) ;
push (@{$opt{vcs_build_args}}, "-CFLAGS \"-I/mnt/users/ssd1/homes/svijay97/BlackParrot/black-parrot-sdk/include -std=c++14\"") ;
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I'll change the path to a generic one

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Please do. It's also not being conditionally added?

push (@{$opt{vcs_build_args}}, "/mnt/users/ssd1/homes/svijay97/BlackParrot/black-parrot-sdk/lib/libdromajo_cosim.a") ;

# Push optional execution drafting enable
push (@{$opt{midas_args}}, "-DED_ENABLE") if ($opt{ed_enable});
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2 changes: 1 addition & 1 deletion piton/verif/env/manycore/devices_blackparrot.xml
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@ Description: Peripheral address map for OpenPiton+BlackParrot configurations.
<name>mem</name>
<base>0x80000000</base>
<!-- 1 GB -->
<length>0x40000000</length>
<length>0x08000000</length>
</port>
<port>
<name>iob</name>
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4 changes: 2 additions & 2 deletions piton/verif/env/manycore/pc_cmp.v.pyv
Original file line number Diff line number Diff line change
Expand Up @@ -258,8 +258,8 @@ endtask // get_thread_status
end

always @(posedge clk) begin
spc0_inst_done <= `BLACKPARROT_CORE0.core.be.calculator.commit_pkt.instret;
spc0_phy_pc_w <= 48'($signed(48'(`BLACKPARROT_CORE0.core.be.calculator.commit_pkt.pc)));
spc0_inst_done <= `BLACKPARROT_CORE0.be.calculator.commit_pkt_cast_o.instret;
spc0_phy_pc_w <= 48'($signed(48'(`BLACKPARROT_CORE0.be.calculator.commit_pkt_cast_o.pc)));
end
`else
`ifdef RTL_PICO0
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