Merge branch 'main' into possible_matches_cache

bfasst/design.py

@@ -110,6 +110,9 @@ def process_yaml(self):
             "verilog_files": lambda value: self.verilog_file_paths.extend(
                 self.path / source for source in value
             ),
+            "system_verilog_files": lambda value: self.system_verilog_file_paths.extend(
+                self.path / source for source in value
+            ),
             "vhdl_libs": lambda value: setattr(self, "vhdl_libs", self.enum_vhdl_libs(value)),
         }
 

bfasst/tools/rev_bit/xray.ninja_build.mustache

@@ -1,11 +1,11 @@
-build {{ xray_fasm }}: bit_to_fasm {{ bitstream_path }} | {{ db_marker }}
+build {{ xray_fasm }}: bit_to_fasm {{ bitstream_path }}
     xray_path = {{ xray_path }}
     fasm2bels_python_path = {{ fasm2bels_python_path }}
     bit_to_fasm_path = {{ bit_to_fasm_path }}
     db_root = {{ db_root }}
     part = {{ part }}
 
-build {{ rev_netlist }} {{ xray_xdc }}: fasm_to_netlist {{ xray_fasm }} | {{ db_marker }}
+build {{ rev_netlist }} {{ xray_xdc }}: fasm_to_netlist {{ xray_fasm }}
     fasm2bels_path = {{ fasm2bels_path }}
     fasm2bels_python_path = {{ fasm2bels_python_path }}
     part_db = {{ part }}_db

bfasst/tools/rev_bit/xray.py

@@ -48,7 +48,6 @@ def create_build_snippets(self):
                     "db_root": XRAY_DB_PATH / config.PART_FAMILY,
                     "part": self.flow.part,
                     "input_xdc": self.xdc_input,
-                    "db_marker": FASM2BELS_PATH / "db_marker",
                 },
             )
 

bfasst/tools/synth/synth_tool.py

@@ -36,6 +36,13 @@ def _read_hdl_files(self):
             self.verilog = [
                 str(self.design_path / file) for file in self.design_props.verilog_files
             ]
+
+        if self.design_props.system_verilog_files is not None:
+            self.system_verilog = [
+                str(self.design_path / file) for file in self.design_props.system_verilog_files
+            ]
+
+        if self.verilog or self.system_verilog:
             return
 
         for child in self.design_path.rglob("*"):

bfasst/yaml_parser.py

@@ -91,6 +91,7 @@ def __init__(self, yaml_path=None):
         self.top = None
         self.vhdl_libs = None
         self.verilog_files = None
+        self.system_verilog_files = None
         self.clocks = {}
         self.part = config.PART
 
@@ -111,6 +112,9 @@ def __init__(self, yaml_path=None):
         if "verilog_files" in props:
             self.verilog_files = props["verilog_files"]
 
+        if "system_verilog_files" in props:
+            self.system_verilog_files = props["system_verilog_files"]
+
 
 class FlowDescriptionParser(YamlParser):
     """Parse the flow description yaml file"""

designs/ooc/mpeg2fpga/design.yaml

@@ -1,5 +1,8 @@
 top: mpeg2fpga_random
 
+system_verilog_files:
+  - mpeg2fpga_random.sv
+
 verilog_files:
   # - fifo_size.v
   - framestore_request.v

scripts/install-fasm2bels.sh

@@ -11,7 +11,7 @@ then
 fi
 
 # Check if submodule path
-if [ ${BFASST_PATH_FASM2BELS} == "third_party/fasm2bels" ]
+if [ "${BFASST_PATH_FASM2BELS}" == "third_party/fasm2bels" ]
 then
     USE_SUBMODULE=true
     git submodule init third_party/fasm2bels
@@ -20,43 +20,45 @@ else
     USE_SUBMODULE=false
 fi
 
+if [ -z "${FASM2BELS_PYTHON_PATH}" ]
+then 
+    FASM2BELS_PYTHON_PATH="${BFASST_PATH_FASM2BELS}/env/conda/envs/f4pga_xc_fasm2bels/bin/python3"
+fi
+
 # Check if cache file matches current commit.  Will return "-" if submodule
 # has not been initialized, so need to remove it.
 FASM2BELS_COMMIT=$(git submodule status third_party/fasm2bels/ | awk '{print $1}')
-if [ ${FASM2BELS_COMMIT::1} = "-" ]
+if [ "${FASM2BELS_COMMIT::1}" = "-" ]
 then
     FASM2BELS_COMMIT=${FASM2BELS_COMMIT:1}
 fi
 
 FASM2BELS_URL=$(git config --file .gitmodules submodule.third_party/fasm2bels.url)
 echo "Need fasm2bels version: ${FASM2BELS_URL} ${FASM2BELS_COMMIT}"
 
-if [ -f ${BFASST_PATH_FASM2BELS}/fasm2bels_commit.txt ] && [ $FASM2BELS_COMMIT == $(cat ${BFASST_PATH_FASM2BELS}/fasm2bels_commit.txt) ] ; then
+if [ -f "${BFASST_PATH_FASM2BELS}/fasm2bels_commit.txt" ] && [ "${FASM2BELS_COMMIT}" == "$(cat ${BFASST_PATH_FASM2BELS}/fasm2bels_commit.txt)" ] ; then
     # Successful cache, do nothing
-    touch ${BFASST_PATH_FASM2BELS}/"db_marker"
     echo "Found cached version of fasm2bels. No install required."
 else
-    echo Installing new version of fasm2bels at ${BFASST_PATH_FASM2BELS}. This will be cached for future use.
-    rm -rf ${BFASST_PATH_FASM2BELS}/fasm2bels_commit.txt
+    echo "Installing new version of fasm2bels at ${BFASST_PATH_FASM2BELS}. This will be cached for future use."
+    rm -rf "${BFASST_PATH_FASM2BELS}/fasm2bels_commit.txt"
 
-    if [ ${USE_SUBMODULE} = true ] ; then
+    if [ "${USE_SUBMODULE}" = true ] ; then
         git submodule update --recursive third_party/fasm2bels
     else
-        rm -rf ${BFASST_PATH_FASM2BELS}
-	    git clone ${FASM2BELS_URL} ${BFASST_PATH_FASM2BELS}
-	    cd ${BFASST_PATH_FASM2BELS} && git reset --hard ${FASM2BELS_COMMIT} && cd -
+        rm -rf "${BFASST_PATH_FASM2BELS}"
+        git clone "${FASM2BELS_URL}" "${BFASST_PATH_FASM2BELS}"
+        cd "${BFASST_PATH_FASM2BELS}" && git reset --hard "${FASM2BELS_COMMIT}" && cd -
     fi
 
-	cd ${BFASST_PATH_FASM2BELS}
+    cd "${BFASST_PATH_FASM2BELS}"
     make env
-	make build
-	make test-py
+    make build
+    make test-py
     cd -
 
-    # Run a design to generate the part database
-    touch ${BFASST_PATH_FASM2BELS}/"db_marker"
-    python scripts/run.py VivadoBitToNetlist designs/basic/and3 --no_tool_checks
+    # Generate the part db to cache
+    "${FASM2BELS_PYTHON_PATH}" "${BFASST_PATH_FASM2BELS}/fasm2bels/database/create_channels.py" --db-root "${BFASST_PATH_FASM2BELS}/third_party/prjxray-db/artix7" --part "xc7a200tsbg484-1" --connection-database-output "${BFASST_PATH_FASM2BELS}/xc7a200tsbg484-1_db"
 
-    echo $FASM2BELS_COMMIT > ${BFASST_PATH_FASM2BELS}/fasm2bels_commit.txt
+    echo "${FASM2BELS_COMMIT}" > "${BFASST_PATH_FASM2BELS}/fasm2bels_commit.txt"
 fi
-