runt tests

tests/passes/profiler_instrumentation/cond.expect

@@ -0,0 +1,35 @@
+import "primitives/core.futil";
+import "primitives/memories/comb.futil";
+component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) {
+  cells {
+    @external a = comb_mem_d1(32, 1, 1);
+    lt = std_lt(32);
+    @control @generated @protected wr_a___main_group_probe = std_wire(1);
+    @control @generated @protected a___wr_a___main_primitive_probe = std_wire(1);
+    @control @generated @protected wr_b___main_group_probe = std_wire(1);
+    @control @generated @protected wr_a___wr_b___main_se_probe = std_wire(1);
+  }
+  wires {
+    group wr_a {
+      a.addr0 = 1'd0;
+      a.write_en = 1'd1;
+      a.write_data = 32'd1;
+      wr_a[done] = a.done;
+      wr_a___main_group_probe.in = 1'd1;
+      a___wr_a___main_primitive_probe.in = 1'd1;
+    }
+    group wr_b {
+      wr_a[go] = lt.out ? 1'd1;
+      wr_b[done] = wr_a[done];
+      wr_b___main_group_probe.in = 1'd1;
+      wr_a___wr_b___main_se_probe.in = lt.out ? 1'd1;
+    }
+    comb group cond {
+      lt.left = 32'd5;
+      lt.right = 32'd9;
+    }
+  }
+  control {
+    wr_b;
+  }
+}

tests/passes/profiler_instrumentation/cond.futil

@@ -1,3 +1,5 @@
+// -p profiler-instrumentation
+
 import "primitives/core.futil";
 import "primitives/memories/comb.futil";
 

tests/passes/profiler_instrumentation/profiler_instrumentation.expect

@@ -0,0 +1,50 @@
+import "primitives/core.futil";
+import "primitives/memories/comb.futil";
+component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) {
+  cells {
+    @external i = comb_mem_d1(32, 1, 1);
+    lt = std_lt(32);
+    lt_reg = std_reg(1);
+    add = std_add(32);
+    @control @generated @protected cond___main_group_probe = std_wire(1);
+    @control @generated @protected lt_reg___cond___main_primitive_probe = std_wire(1);
+    @control @generated @protected incr___main_group_probe = std_wire(1);
+    @control @generated @protected i___incr___main_primitive_probe = std_wire(1);
+  }
+  wires {
+    group cond {
+      i.addr0 = 1'd0;
+      lt.left = i.read_data;
+      lt.right = 32'd8;
+      lt_reg.in = lt.out;
+      lt_reg.write_en = 1'd1;
+      cond[done] = lt_reg.done;
+      cond___main_group_probe.in = 1'd1;
+      lt_reg___cond___main_primitive_probe.in = 1'd1;
+    }
+    group incr<"static"=1> {
+      add.right = i.read_data;
+      add.left = 32'd1;
+      i.write_data = add.out;
+      i.addr0 = 1'd0;
+      i.write_en = 1'd1;
+      incr[done] = i.done;
+      incr___main_group_probe.in = 1'd1;
+      i___incr___main_primitive_probe.in = 1'd1;
+    }
+  }
+  control {
+    seq {
+      cond;
+      while lt_reg.out {
+        seq {
+          incr;
+          incr;
+          cond;
+        }
+      }
+    }
+  }
+}
+---STDERR---
+[WARN  calyx_frontend::attribute] The attribute @static is deprecated and will be ignored by the compiler.

tests/passes/profiler_instrumentation/profiler_instrumentation.futil

@@ -1,4 +1,4 @@
-//-p profiler-instrumentation
+// -p profiler-instrumentation
 
 import "primitives/core.futil";
 import "primitives/memories/comb.futil";

tests/passes/profiler_instrumentation/triple-multi-component.expect

@@ -0,0 +1,65 @@
+import "primitives/core.futil";
+import "primitives/memories/comb.futil";
+component identity(in: 32, @go go: 1, @clk clk: 1, @reset reset: 1) -> (out: 32, @done done: 1) {
+  cells {
+    r = std_reg(32);
+    @control @generated @protected save___identity_group_probe = std_wire(1);
+    @control @generated @protected r___save___identity_primitive_probe = std_wire(1);
+  }
+  wires {
+    group save {
+      r.in = in;
+      r.write_en = 1'd1;
+      save[done] = r.done;
+      save___identity_group_probe.in = 1'd1;
+      r___save___identity_primitive_probe.in = 1'd1;
+    }
+    out = r.out;
+  }
+  control {
+    save;
+  }
+}
+component middle(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) {
+  cells {
+    id = identity();
+    current_value = std_reg(32);
+    @control @generated @protected run_id___middle_group_probe = std_wire(1);
+    @control @generated @protected id___run_id___middle_cell_probe = std_wire(1);
+    @control @generated @protected use_id___middle_group_probe = std_wire(1);
+    @control @generated @protected current_value___use_id___middle_primitive_probe = std_wire(1);
+  }
+  wires {
+    group run_id {
+      id.in = 32'd10;
+      id.go = 1'd1;
+      run_id[done] = id.done;
+      run_id___middle_group_probe.in = 1'd1;
+      id___run_id___middle_cell_probe.in = 1'd1;
+    }
+    group use_id {
+      current_value.in = id.out;
+      current_value.write_en = 1'd1;
+      use_id[done] = current_value.done;
+      use_id___middle_group_probe.in = 1'd1;
+      current_value___use_id___middle_primitive_probe.in = 1'd1;
+    }
+  }
+  control {
+    seq {
+      run_id;
+      use_id;
+    }
+  }
+}
+component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) {
+  cells {
+    mid = middle();
+  }
+  wires {}
+  control {
+    seq {
+      invoke mid()();
+    }
+  }
+}

tests/passes/profiler_instrumentation/triple-multi-component.futil

@@ -1,3 +1,5 @@
+// -p profiler-instrumentation
+
 import "primitives/core.futil";
 import "primitives/memories/comb.futil";