Complete AXI wrapper generator #1934
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Done with input/output, cells, wires, and groups (there are none) TODO: Control sequence
TBD If the spec is implemented properly (probably not) TODO: 1. Get AXI working with cocotb tests 2. Hook up runt tests 3. Refactor/minimize generator code 4... Fud2 integration?
Issue before was the vec_add was wrong, we need 4 bits instead of 3, even though we're counting 0-7 because of the presence of a <= check (so we need to get to 8 for our while loop to terminate)
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Wahoo!! This looks great! I say go right ahead and merge as is.
On the subject of next steps and making end-to-end runs of arbitrary programs easy: I can think of one other thing we will need to do which does not already have an issue associated with it. Namely, I believe that axi-combined-tests.py will need to be extended a bit to take in an YXI JSON file. (It currently hard-codes the memory sizes/names, I think?) That is, the same YXI file can go into both this testbench and also the wrapper generator.
| paths = ["yxi/axi-calyx/axi-generator.py"] | ||
| cmd = """ | ||
| python3 {} | ||
| """ |
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Looks good for now! In the future, you can imagine this using a set of YXI inputs as the test files, so we see different AXI-wrapper code generated for each one.
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I mentioned this in #1928, which is not very fleshed out currently, but I think(?) points to what you're getting at.
This PR introduces a working
axi-generator.pywhich takes in anyxispecification for a Calyx program and generates an AXI wrapper that can be integrated with said program.The AXI wrapper uses a read -> compute -> write scheme in that it reads all of its data via AXI, populating internal
refmemories, before invoking somemainmodule that is expected to perform a computation on those memories, and then writing the results back to the host via AXI.This PR adds some concrete examples to be used as a working example to make changes off of.
Namely, a wrapped version of
vec_addis added atyxi/axi-calyx/generated-axi-with-vec-add.futil.This is the result of concatenating a fixed (some bit width adjustments)
vec_addatfixed-vec-add.futilto the wrapper generated by passing the following yxi toaxi-generator.py:{ "toplevel": "main", "memories": [ { "name": "A0", "width": 32, "size": 8 }, { "name": "B0", "width": 32, "size": 8 }, { "name": "Sum0", "width": 32, "size": 8 } ] }It seems to me like the immediate next step should be getting this integrated to work with
fud2and ensure that this wrapper works on more programs than justvec_add.#1932 #1933 and #1918 work towards that goal.We will also need to eventually figure out the subordinate control scheme to eventually work with XRT, but I think it can make sense for that to happen after the
fud2integration is done. Happy to hear other thoughts, though.