[Cider] Clock propagation

[EclecticGriffin]

This somewhat chunky PR includes the logic needed to propagate clocks through combinational logic and amends the read checks to defer until the value is used in a non-combinational context. The continuous assignments now run under a single thread which is never synchronized, so attempts to write a register in continuous logic will always result in a race when used outside continuous logic.

There's some additional refactoring and minor changes to the primitive interface. Additionally, a single step can now advance past multiple control nodes, which should reduce some of the repetition when using the debugger