Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Add ARC auto-sync architecture #2570

Open
wants to merge 28 commits into
base: next
Choose a base branch
from
Open
Show file tree
Hide file tree
Changes from 25 commits
Commits
Show all changes
28 commits
Select commit Hold shift + click to select a range
fbb3991
Add ARC files
R33v0LT Aug 4, 2024
3b731d9
Added ARC files for successful compilation
R33v0LT Oct 27, 2024
2363031
Refactor ARC files
R33v0LT Dec 2, 2024
173b587
Add ARC c/cs tests
R33v0LT Dec 2, 2024
02b498f
Add ARC python test/bindings
R33v0LT Dec 2, 2024
c94c5df
Add ARC to CI/CD
R33v0LT Dec 2, 2024
190516e
Avoid omitting parameter names
R33v0LT Dec 2, 2024
cef71a5
Update cs files
R33v0LT Dec 4, 2024
eeaff5d
Fix ARC bugs
R33v0LT Dec 4, 2024
cdec496
Update ARC python bindings
R33v0LT Dec 4, 2024
982f3f6
Refactor and update ARC test files
R33v0LT Dec 4, 2024
8a515b9
Add detail flag to arc test
R33v0LT Dec 4, 2024
8b35577
Fix ARC test problems
R33v0LT Dec 4, 2024
4c094b8
Fix ARCMapping compile error
R33v0LT Dec 4, 2024
d4cd8ba
Replace __CHAR_BIT__ to CHAR_BIT
R33v0LT Dec 4, 2024
f457e17
Add credits and ARC info
R33v0LT Dec 4, 2024
ee448e6
Update ARC to match the latest next
R33v0LT Dec 5, 2024
328ae07
Python formatting
R33v0LT Dec 5, 2024
6973284
Remove asserts on 'Unknown condition code passed'
R33v0LT Dec 5, 2024
e4aef04
Add ARC to some more documentation
R33v0LT Dec 5, 2024
0f29088
Add ARC to Targets constants
R33v0LT Dec 5, 2024
165c01b
Add ARC support to llvm-tblgen
R33v0LT Dec 5, 2024
d98e2be
Replace asserts & add Expr handling
R33v0LT Dec 9, 2024
06afa37
Check DecodeGPR32RegisterClass return value
R33v0LT Dec 17, 2024
d977b77
Fix fieldFromInstruction patch
R33v0LT Dec 17, 2024
0b6655d
Refactor ARC
R33v0LT Dec 24, 2024
a69e9d1
Reformat python files
R33v0LT Dec 24, 2024
43da7fa
Fix incorrect import
R33v0LT Dec 24, 2024
File filter

Filter by extension

Filter by extension


Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
7 changes: 7 additions & 0 deletions .github/labeler.yml
Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,13 @@ Alpha:
- tests/MC/Alpha/**
- tests/details/alpha.yaml

ARC:
- arch/ARC/*
- cstool/cstool_arc.c
- include/capstone/arc.h
- suite/MC/ARC/*
- tests/test_arc.c

BPF:
- arch/BPF/**
- cstool/cstool_bpf.c
Expand Down
4 changes: 3 additions & 1 deletion .github/workflows/auto-sync.yml
Original file line number Diff line number Diff line change
Expand Up @@ -55,7 +55,7 @@ jobs:
cd vendor/llvm_root
mkdir build
cd build
cmake -G Ninja -DCMAKE_BUILD_TYPE=Debug ../llvm
cmake -G Ninja -DCMAKE_BUILD_TYPE=Debug -DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD=ARC ../llvm
cmake --build . --target llvm-tblgen --config Debug
cd ../../../

Expand All @@ -74,6 +74,7 @@ jobs:
run: |
./src/autosync/ASUpdater.py -d -a AArch64 -s IncGen
./src/autosync/ASUpdater.py -d -a Alpha -s IncGen
./src/autosync/ASUpdater.py -d -a ARC -s IncGen
./src/autosync/ASUpdater.py -d -a ARM -s IncGen
./src/autosync/ASUpdater.py -d -a PPC -s IncGen
./src/autosync/ASUpdater.py -d -a LoongArch -s IncGen
Expand All @@ -93,6 +94,7 @@ jobs:
- name: CppTranslator - Test translation
run: |
./src/autosync/ASUpdater.py --ci -d -a AArch64 -s Translate
./src/autosync/ASUpdater.py --ci -d -a ARC -s Translate
./src/autosync/ASUpdater.py --ci -d -a ARM -s Translate
./src/autosync/ASUpdater.py --ci -d -a PPC -s Translate
./src/autosync/ASUpdater.py --ci -d -a LoongArch -s Translate
Expand Down
1 change: 1 addition & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -79,6 +79,7 @@ tests/test_riscv
tests/test_sh
tests/test_alpha
tests/test_hppa
tests/test_arc

# regress binaries
suite/regress/invalid_read_in_print_operand
Expand Down
1 change: 1 addition & 0 deletions BUILDING.md
Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,7 @@ By default all are enabled.
- `CAPSTONE_ARM_SUPPORT`: Support ARM.
- `CAPSTONE_AARCH64_SUPPORT`: Support AARCH64.
- `CAPSTONE_ALPHA_SUPPORT`: Support Alpha.
- `CAPSTONE_ARC_SUPPORT`: Support ARC.
- `CAPSTONE_HPPA_SUPPORT`: Support HPPA.
- `CAPSTONE_LOONGARCH_SUPPORT`: Support LoongArch.
- `CAPSTONE_M680X_SUPPORT`: Support M680X.
Expand Down
25 changes: 23 additions & 2 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -99,8 +99,8 @@ if(APPLE AND NOT CAPSTONE_BUILD_MACOS_THIN)
set(CMAKE_OSX_ARCHITECTURES "x86_64;arm64")
endif()

set(SUPPORTED_ARCHITECTURES ARM AARCH64 M68K MIPS PPC SPARC SYSTEMZ XCORE X86 TMS320C64X M680X EVM MOS65XX WASM BPF RISCV SH TRICORE ALPHA HPPA LOONGARCH XTENSA)
set(SUPPORTED_ARCHITECTURE_LABELS ARM AARCH64 M68K MIPS PowerPC Sparc SystemZ XCore x86 TMS320C64x M680x EVM MOS65XX WASM BPF RISCV SH TriCore Alpha HPPA LoongArch Xtensa)
set(SUPPORTED_ARCHITECTURES ARM AARCH64 M68K MIPS PPC SPARC SYSTEMZ XCORE X86 TMS320C64X M680X EVM MOS65XX WASM BPF RISCV SH TRICORE ALPHA HPPA LOONGARCH XTENSA ARC)
set(SUPPORTED_ARCHITECTURE_LABELS ARM AARCH64 M68K MIPS PowerPC Sparc SystemZ XCore x86 TMS320C64x M680x EVM MOS65XX WASM BPF RISCV SH TriCore Alpha HPPA LoongArch Xtensa ARC)

# If building for OSX it's best to allow CMake to handle building both architectures
if(APPLE AND NOT CAPSTONE_BUILD_MACOS_THIN)
Expand Down Expand Up @@ -226,6 +226,7 @@ set(HEADERS_COMMON
include/capstone/hppa.h
include/capstone/loongarch.h
include/capstone/xtensa.h
include/capstone/arc.h
)

## architecture support
Expand Down Expand Up @@ -710,6 +711,22 @@ if(CAPSTONE_XTENSA_SUPPORT)
)
endif()

if (CAPSTONE_ARC_SUPPORT)
add_definitions(-DCAPSTONE_HAS_ARC)
set(SOURCES_ARC
arch/ARC/ARCDisassembler.c
arch/ARC/ARCInstPrinter.c
arch/ARC/ARCMapping.c
arch/ARC/ARCModule.c
)
set(HEADERS_ARC
arch/ARC/ARCInstPrinter.h
arch/ARC/ARCMapping.h
arch/ARC/ARCModule.h
arch/ARC/ARCLinkage.h
)
endif ()

if (CAPSTONE_OSXKERNEL_SUPPORT)
add_definitions(-DCAPSTONE_HAS_OSXKERNEL)
endif()
Expand Down Expand Up @@ -738,6 +755,7 @@ set(ALL_SOURCES
${SOURCES_HPPA}
${SOURCES_LOONGARCH}
${SOURCES_XTENSA}
${SOURCES_ARC}
)

set(ALL_HEADERS
Expand Down Expand Up @@ -765,6 +783,7 @@ set(ALL_HEADERS
${HEADERS_HPPA}
${HEADERS_LOONGARCH}
${HEADERS_XTENSA}
${HEADERS_ARC}
)

## properties
Expand Down Expand Up @@ -833,6 +852,7 @@ source_group("Source\\Alpha" FILES ${SOURCES_ALPHA})
source_group("Source\\HPPA" FILES ${SOURCES_HPPA})
source_group("Source\\LoongArch" FILES ${SOURCES_LOONGARCH})
source_group("Source\\Xtensa" FILES ${SOURCES_XTENSA})
source_group("Source\\ARC" FILES ${SOURCES_ARC})

source_group("Include\\Common" FILES ${HEADERS_COMMON})
source_group("Include\\Engine" FILES ${HEADERS_ENGINE})
Expand All @@ -858,6 +878,7 @@ source_group("Include\\Alpha" FILES ${HEADERS_ALPHA})
source_group("Include\\HPPA" FILES ${HEADERS_HPPA})
source_group("Include\\LoongArch" FILES ${HEADERS_LOONGARCH})
source_group("Include\\Xtensa" FILES ${HEADERS_XTENSA})
source_group("Include\\ARC" FILES ${HEADERS_ARC})

## installation
if(CAPSTONE_INSTALL)
Expand Down
1 change: 1 addition & 0 deletions COMPILE_MAKE.TXT
Original file line number Diff line number Diff line change
Expand Up @@ -94,6 +94,7 @@ Capstone requires no prerequisite packages, so it is easy to compile & install.
/usr/include/capstone/arm.h
/usr/include/capstone/arm64.h
/usr/include/capstone/alpha.h
/usr/include/capstone/arc.h
/usr/include/capstone/bpf.h
/usr/include/capstone/capstone.h
/usr/include/capstone/evm.h
Expand Down
2 changes: 1 addition & 1 deletion CREDITS.TXT
Original file line number Diff line number Diff line change
Expand Up @@ -88,6 +88,6 @@ fanfuqiang & citypw & porto703 : RISCV architecture.
Josh "blacktop" Maine: Arm64 architecture improvements.
Finn Wilkinson: AArch64 update to Armv9.2-a (SME + SVE2 support)
Billow & Sidneyp: TriCore architecture.
Dmitry Sibirtsev: Alpha & HPPA architecture.
Dmitry Sibirtsev: Alpha, HPPA, ARC architecture.
Jiajie Chen & Yanglin Xun: LoongArch architecture.
Billow: Xtensa architecture.
13 changes: 12 additions & 1 deletion Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -365,11 +365,21 @@ ifneq (,$(findstring xtensa,$(CAPSTONE_ARCHS)))
LIBOBJ_XTENSA += $(LIBSRC_XTENSA:%.c=$(OBJDIR)/%.o)
endif

DEP_ARC =
DEP_ARC += $(wildcard arch/ARC/ARC*.inc)

LIBOBJ_ARC =
ifneq (,$(findstring arc,$(CAPSTONE_ARCHS)))
CFLAGS += -DCAPSTONE_HAS_ARC
LIBSRC_ARC += $(wildcard arch/ARC/ARC*.c)
LIBOBJ_ARC += $(LIBSRC_ARC:%.c=$(OBJDIR)/%.o)
endif

LIBOBJ =
LIBOBJ += $(OBJDIR)/cs.o $(OBJDIR)/utils.o $(OBJDIR)/SStream.o $(OBJDIR)/MCInstrDesc.o $(OBJDIR)/MCRegisterInfo.o $(OBJDIR)/MCInst.o $(OBJDIR)/MCInstPrinter.o $(OBJDIR)/Mapping.o
LIBOBJ += $(LIBOBJ_ARM) $(LIBOBJ_AARCH64) $(LIBOBJ_M68K) $(LIBOBJ_MIPS) $(LIBOBJ_PPC) $(LIBOBJ_RISCV) $(LIBOBJ_SPARC) $(LIBOBJ_SYSZ) $(LIBOBJ_SH)
LIBOBJ += $(LIBOBJ_X86) $(LIBOBJ_XCORE) $(LIBOBJ_TMS320C64X) $(LIBOBJ_M680X) $(LIBOBJ_EVM) $(LIBOBJ_MOS65XX) $(LIBOBJ_WASM) $(LIBOBJ_BPF)
LIBOBJ += $(LIBOBJ_TRICORE) $(LIBOBJ_ALPHA) $(LIBOBJ_HPPA) $(LIBOBJ_LOONGARCH) $(LIBOBJ_XTENSA)
LIBOBJ += $(LIBOBJ_TRICORE) $(LIBOBJ_ALPHA) $(LIBOBJ_HPPA) $(LIBOBJ_LOONGARCH) $(LIBOBJ_XTENSA) $(LIBOBJ_ARC)


ifeq ($(PKG_EXTRA),)
Expand Down Expand Up @@ -503,6 +513,7 @@ $(LIBOBJ_ALPHA): $(DEP_ALPHA)
$(LIBOBJ_HPPA): $(DEP_HPPA)
$(LIBOBJ_LOONGARCH): $(DEP_LOONGARCH)
$(LIBOBJ_XTENSA): $(DEP_XTENSA)
$(LIBOBJ_ARC): $(DEP_ARC)

ifeq ($(CAPSTONE_STATIC),yes)
$(ARCHIVE): $(LIBOBJ)
Expand Down
1 change: 1 addition & 0 deletions Mapping.c
Original file line number Diff line number Diff line change
Expand Up @@ -354,6 +354,7 @@ DEFINE_get_detail_op(riscv, RISCV);
DEFINE_get_detail_op(systemz, SystemZ);
DEFINE_get_detail_op(xtensa, Xtensa);
DEFINE_get_detail_op(bpf, BPF);
DEFINE_get_detail_op(arc, ARC);

/// Returns true if for this architecture the
/// alias operands should be filled.
Expand Down
5 changes: 5 additions & 0 deletions Mapping.h
Original file line number Diff line number Diff line change
Expand Up @@ -146,6 +146,7 @@ DECL_get_detail_op(riscv, RISCV);
DECL_get_detail_op(systemz, SystemZ);
DECL_get_detail_op(xtensa, Xtensa);
DECL_get_detail_op(bpf, BPF);
DECL_get_detail_op(arc, ARC);

/// Increments the detail->arch.op_count by one.
#define DEFINE_inc_detail_op_count(arch, ARCH) \
Expand Down Expand Up @@ -185,6 +186,8 @@ DEFINE_inc_detail_op_count(xtensa, Xtensa);
DEFINE_dec_detail_op_count(xtensa, Xtensa);
DEFINE_inc_detail_op_count(bpf, BPF);
DEFINE_dec_detail_op_count(bpf, BPF);
DEFINE_inc_detail_op_count(arc, ARC);
DEFINE_dec_detail_op_count(arc, ARC);

/// Returns true if a memory operand is currently edited.
static inline bool doing_mem(const MCInst *MI)
Expand Down Expand Up @@ -215,6 +218,7 @@ DEFINE_get_arch_detail(hppa, HPPA);
DEFINE_get_arch_detail(loongarch, LoongArch);
DEFINE_get_arch_detail(mips, Mips);
DEFINE_get_arch_detail(riscv, RISCV);
DEFINE_get_arch_detail(arc, ARC);
DEFINE_get_arch_detail(systemz, SystemZ);
DEFINE_get_arch_detail(xtensa, Xtensa);
DEFINE_get_arch_detail(bpf, BPF);
Expand All @@ -235,6 +239,7 @@ DEFINE_check_safe_inc(RISCV, RISCV);
DEFINE_check_safe_inc(SystemZ, SYSTEMZ);
DEFINE_check_safe_inc(Mips, MIPS);
DEFINE_check_safe_inc(BPF, BPF);
DEFINE_check_safe_inc(ARC, ARC);

static inline bool detail_is_set(const MCInst *MI)
{
Expand Down
8 changes: 8 additions & 0 deletions MathExtras.h
Original file line number Diff line number Diff line change
Expand Up @@ -493,4 +493,12 @@ static inline uint32_t get_insn_bit(uint32_t insn, uint8_t bit)
return get_insn_field(insn, bit, bit);
}

/// \brief Create a bitmask with the N right-most bits set to 1, and all other
/// bits set to 0. Only unsigned types are allowed.
static inline uint32_t maskTrailingOnes32(uint32_t N)
{
const unsigned Bits = CHAR_BIT * sizeof(uint32_t);
return N == 0 ? 0 : (((uint32_t) -1) >> (Bits - N));
}

#endif
2 changes: 1 addition & 1 deletion README.md
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ disasm engine for binary analysis and reversing in the security community.
Created by Nguyen Anh Quynh, then developed and maintained by a small community,
Capstone offers some unparalleled features:

- Support multiple hardware architectures: ARM, AArch64, Alpha, BPF, Ethereum VM,
- Support multiple hardware architectures: ARM, AArch64, Alpha, ARC, BPF, Ethereum VM,
LoongArch, HP PA-RISC (HPPA), M68K, M680X, Mips, MOS65XX, PPC, RISC-V(rv32G/rv64G), SH,
Sparc, SystemZ, TMS320C64X, TriCore, Webassembly, XCore and X86 (16, 32, 64), Xtensa.

Expand Down
Loading
Loading