Implement script to evaluate lint and format compliance

[mczyz-antmicro]

The script enables:

• Running verible-verilog-{lint|format} on all verilog files in Cores-VeeR-EL2
• Git restoring changed files

Use prepared run.sh bash script to saves outputs in .log files and error statistics in lint.rpt file

[github-actions]

Remaining comments which cannot be posted as a review comment to avoid GitHub Rate Limit

verible-verilog-format

design/dec/el2_dec_tlu_ctl.sv|2570|
design/dec/el2_dec_tlu_ctl.sv|2573|
design/dec/el2_dec_tlu_ctl.sv|2577|
design/dec/el2_dec_tlu_ctl.sv|2580|
design/dec/el2_dec_tlu_ctl.sv|2583|
design/dec/el2_dec_tlu_ctl.sv|2586|
design/dec/el2_dec_tlu_ctl.sv|2589|
design/dec/el2_dec_tlu_ctl.sv|2592|
design/dec/el2_dec_tlu_ctl.sv|2595|
design/dec/el2_dec_tlu_ctl.sv|2598|
design/dec/el2_dec_tlu_ctl.sv|2601|
design/dec/el2_dec_tlu_ctl.sv|2604|
design/dec/el2_dec_tlu_ctl.sv|2607|
design/dec/el2_dec_tlu_ctl.sv|2611|
design/dec/el2_dec_tlu_ctl.sv|2620|
design/dec/el2_dec_tlu_ctl.sv|2623|
design/dec/el2_dec_tlu_ctl.sv|2626|
design/dec/el2_dec_tlu_ctl.sv|2629|
design/dec/el2_dec_tlu_ctl.sv|2632|
design/dec/el2_dec_tlu_ctl.sv|2635|
design/dec/el2_dec_tlu_ctl.sv|2638|
design/dec/el2_dec_tlu_ctl.sv|2646|
design/dec/el2_dec_tlu_ctl.sv|2659|
design/dec/el2_dec_tlu_ctl.sv|2672|
design/el2_veer.sv|730|
design/el2_veer.sv|737|
design/el2_veer.sv|739|
design/el2_veer.sv|741|
design/el2_veer.sv|745|
design/ifu/el2_ifu.sv|194|
design/ifu/el2_ifu.sv|211|
design/ifu/el2_ifu_mem_ctl.sv|1656|
design/ifu/el2_ifu_mem_ctl.sv|1671|
design/ifu/el2_ifu_mem_ctl.sv|1674|
design/include/el2_def.sv|433|
design/include/el2_def.sv|435|
design/lsu/el2_lsu.sv|222|
design/lsu/el2_lsu.sv|323|
design/lsu/el2_lsu_addrcheck.sv|50|
design/lsu/el2_lsu_addrcheck.sv|56|
design/lsu/el2_lsu_addrcheck.sv|134|
design/lsu/el2_lsu_addrcheck.sv|172|
design/lsu/el2_lsu_addrcheck.sv|182|
design/lsu/el2_lsu_addrcheck.sv|197|
design/lsu/el2_lsu_lsc_ctl.sv|267|
design/lsu/el2_lsu_lsc_ctl.sv|274|
design/lsu/el2_lsu_lsc_ctl.sv|280|
design/lsu/el2_lsu_lsc_ctl.sv|287|
design/lsu/el2_lsu_lsc_ctl.sv|293|
verification/block/dccm/el2_lsu_dccm_mem_wrapper.sv|5|
verification/block/dccm/el2_lsu_dccm_mem_wrapper.sv|42|
verification/block/exu_alu/el2_exu_alu_ctl_wrapper.sv|4|
verification/block/exu_alu/el2_exu_alu_ctl_wrapper.sv|6|
verification/block/exu_alu/el2_exu_alu_ctl_wrapper.sv|19|
verification/block/exu_alu/el2_exu_alu_ctl_wrapper.sv|80|
verification/block/exu_alu/el2_exu_alu_ctl_wrapper.sv|125|
verification/block/exu_div/el2_exu_div_ctl_wrapper.sv|4|
verification/block/exu_div/el2_exu_div_ctl_wrapper.sv|6|
verification/block/exu_div/el2_exu_div_ctl_wrapper.sv|14|
verification/block/exu_div/el2_exu_div_ctl_wrapper.sv|18|
verification/block/exu_div/el2_exu_div_ctl_wrapper.sv|21|
verification/block/exu_div/el2_exu_div_ctl_wrapper.sv|23|
verification/block/exu_div/el2_exu_div_ctl_wrapper.sv|27|
verification/block/exu_div/el2_exu_div_ctl_wrapper.sv|33|
verification/block/exu_mul/el2_exu_mul_ctl_wrapper.sv|4|
verification/block/exu_mul/el2_exu_mul_ctl_wrapper.sv|6|
verification/block/exu_mul/el2_exu_mul_ctl_wrapper.sv|14|
verification/block/exu_mul/el2_exu_mul_ctl_wrapper.sv|38|
verification/block/exu_mul/el2_exu_mul_ctl_wrapper.sv|44|
verification/block/exu_mul/el2_exu_mul_ctl_wrapper.sv|70|
verification/block/iccm/el2_ifu_iccm_mem_wrapper.sv|5|
verification/block/iccm/el2_ifu_iccm_mem_wrapper.sv|8|
verification/block/iccm/el2_ifu_iccm_mem_wrapper.sv|38|

[github-actions]

Links to coverage and verification reports for this PR (#75) are available at https://chipsalliance.github.io/Cores-VeeR-EL2/

[github-actions]

Links to coverage and verification reports for this PR (#75) are available at https://chipsalliance.github.io/Cores-VeeR-EL2/