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td-layout: update source code based on new layout
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Payload image is loaded into physical memory space so the functions
under memslice are updated and the metadata is updated.

Signed-off-by: Jiaqi Gao <[email protected]>
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@gaojiaqi7
gaojiaqi7 committed Mar 24, 2024
1 parent cca148a commit 1b71a3c
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Showing 7 changed files with 97 additions and 126 deletions.
2 changes: 1 addition & 1 deletion devtools/td-layout-config/config_memory_exec.json
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Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@
"type": "Memory"
},
{
"name": "PayloadImage",
"name": "ShimPayload",
"size": "0xC2D000",
"type": "Memory"
},
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68 changes: 30 additions & 38 deletions td-layout/src/build_time.rs
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// Copyright (c) 2021 - 2023 Intel Corporation
// Copyright (c) 2021 - 2024 Intel Corporation
//
// SPDX-License-Identifier: BSD-2-Clause-Patent

Expand All @@ -7,72 +7,64 @@
/*
Image Layout
+----------------------------------------+ <- 0x0
| CONFIG | (0x40000) 256 KB
| CONFIG | (0x40000) 256 kB
+----------------------------------------+ <- 0x40000
| MAILBOX | (0x1000) 4 KB
| MAILBOX | (0x1000) 4 kB
+----------------------------------------+ <- 0x41000
| TEMP_STACK | (0x20000) 128 KB
| TEMP_STACK | (0x20000) 128 kB
+----------------------------------------+ <- 0x61000
| TEMP_HEAP | (0x20000) 128 KB
| TEMP_HEAP | (0x20000) 128 kB
+----------------------------------------+ <- 0x81000
| FREE | (0x1000) 4 KB
+----------------------------------------+ <- 0x82000
| PAYLOAD | (0xC2D000) 12.18 MB
| FREE | (0x0) 0 B
+----------------------------------------+ <- 0x81000
| PAYLOAD | (0xC2E000) 12.18 MB
+----------------------------------------+ <- 0xCAF000
| METADATA | (0x1000) 4 KB
| METADATA | (0x1000) 4 kB
+----------------------------------------+ <- 0xCB0000
| IPL | (0x348000) 3.28 MB
+----------------------------------------+ <- 0xFF8000
| RESET_VECTOR | (0x8000) 32 KB
| RESET_VECTOR | (0x8000) 32 kB
+----------------------------------------+ <- 0x1000000
Image size: 0x1000000 (16 MB)
*/

// Image Layout Configuration

// Image configuration
pub const TD_SHIM_IMAGE_SIZE: u32 = 0x1000000;
pub const TD_SHIM_CONFIG_OFFSET: u32 = 0x0;
pub const TD_SHIM_CONFIG_SIZE: u32 = 0x40000; // 256 KB

pub const TD_SHIM_MAILBOX_OFFSET: u32 = 0x40000;
pub const TD_SHIM_MAILBOX_SIZE: u32 = 0x1000; // 4 KB

pub const TD_SHIM_TEMP_STACK_OFFSET: u32 = 0x41000;
pub const TD_SHIM_TEMP_STACK_SIZE: u32 = 0x20000; // 128 KB

pub const TD_SHIM_TEMP_HEAP_OFFSET: u32 = 0x61000;
pub const TD_SHIM_TEMP_HEAP_SIZE: u32 = 0x20000; // 128 KB

pub const TD_SHIM_FREE_OFFSET: u32 = 0x81000;
pub const TD_SHIM_FREE_SIZE: u32 = 0x1000; // 4 KB

pub const TD_SHIM_PAYLOAD_OFFSET: u32 = 0x82000;
pub const TD_SHIM_PAYLOAD_SIZE: u32 = 0xC2D000; // 12.18 MB

pub const TD_SHIM_PAYLOAD_OFFSET: u32 = 0x81000;
pub const TD_SHIM_METADATA_OFFSET: u32 = 0xCAF000;
pub const TD_SHIM_METADATA_SIZE: u32 = 0x1000; // 4 KB

pub const TD_SHIM_IPL_OFFSET: u32 = 0xCB0000;
pub const TD_SHIM_IPL_SIZE: u32 = 0x348000; // 3.28 MB

pub const TD_SHIM_RESET_VECTOR_OFFSET: u32 = 0xFF8000;
pub const TD_SHIM_RESET_VECTOR_SIZE: u32 = 0x8000; // 32 KB

// Offset when Loading into Memory
// Size of regions
pub const TD_SHIM_CONFIG_SIZE: u32 = 0x40000;
pub const TD_SHIM_MAILBOX_SIZE: u32 = 0x1000;
pub const TD_SHIM_TEMP_STACK_SIZE: u32 = 0x20000;
pub const TD_SHIM_TEMP_HEAP_SIZE: u32 = 0x20000;
pub const TD_SHIM_FREE_SIZE: u32 = 0x0;
pub const TD_SHIM_PAYLOAD_SIZE: u32 = 0xC2E000;
pub const TD_SHIM_METADATA_SIZE: u32 = 0x1000;
pub const TD_SHIM_IPL_SIZE: u32 = 0x348000;
pub const TD_SHIM_RESET_VECTOR_SIZE: u32 = 0x8000;

pub const TD_SHIM_FIRMWARE_BASE: u32 = 0xFF000000;
pub const TD_SHIM_FIRMWARE_SIZE: u32 = 0x1000000;

// TD_SHIM_SEC_INFO_OFFSET equals to firmware size - metadata pointer offset -
// OVMF GUID table size - SEC Core information size.
pub const TD_SHIM_SEC_CORE_INFO_OFFSET: u32 = 0xFFFFAC;
pub const TD_SHIM_SEC_CORE_INFO_BASE: u32 = 0xFFFFFFAC;

// Base Address after Loaded into Memory
// ROM configuration
pub const TD_SHIM_CONFIG_BASE: u32 = 0xFF000000;
pub const TD_SHIM_MAILBOX_BASE: u32 = 0xFF040000;
pub const TD_SHIM_TEMP_STACK_BASE: u32 = 0xFF041000;
pub const TD_SHIM_TEMP_HEAP_BASE: u32 = 0xFF061000;
pub const TD_SHIM_FREE_BASE: u32 = 0xFF081000;
pub const TD_SHIM_PAYLOAD_BASE: u32 = 0xFF082000;
pub const TD_SHIM_METADATA_BASE: u32 = 0xFFCAF000;
pub const TD_SHIM_IPL_BASE: u32 = 0xFFCB0000;
pub const TD_SHIM_RESET_VECTOR_BASE: u32 = 0xFFFF8000;

// TD_SHIM_SEC_INFO_OFFSET equals to firmware size - metadata pointer offset -
// OVMF GUID table size - SEC Core information size.
pub const TD_SHIM_SEC_CORE_INFO_OFFSET: u32 = 0xFFFFAC;
pub const TD_SHIM_SEC_CORE_INFO_BASE: u32 = 0xFFFFFFAC;
22 changes: 2 additions & 20 deletions td-layout/src/memslice.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ pub enum SliceType {
Config,
/// The `TD_HOB` region in image file
TdHob,
/// The `Payload and Metadata` region in image file
/// The `Payload Image` region in runtime memory layout
ShimPayload,
/// The `TD_MAILBOX` region in image file
MailBox,
Expand Down Expand Up @@ -69,10 +69,6 @@ pub fn get_mem_slice<'a>(t: SliceType) -> &'a [u8] {
TD_SHIM_CONFIG_BASE as *const u8,
TD_SHIM_CONFIG_SIZE as usize,
),
SliceType::ShimPayload => core::slice::from_raw_parts(
TD_SHIM_PAYLOAD_BASE as *const u8,
TD_SHIM_PAYLOAD_SIZE as usize,
),
SliceType::MailBox => core::slice::from_raw_parts(
TD_SHIM_MAILBOX_BASE as *const u8,
TD_SHIM_MAILBOX_SIZE as usize,
Expand All @@ -94,7 +90,7 @@ pub unsafe fn get_mem_slice_mut<'a>(t: SliceType) -> &'a mut [u8] {
TD_SHIM_MAILBOX_BASE as *const u8 as *mut u8,
TD_SHIM_MAILBOX_SIZE as usize,
),
SliceType::Config | SliceType::ShimPayload => {
SliceType::Config => {
panic!("get_mem_slice_mut: read only")
}
_ => panic!("get_mem_slice_mut: not support"),
Expand All @@ -111,12 +107,6 @@ mod test {
assert_eq!(config.len(), TD_SHIM_CONFIG_SIZE as usize);
}

#[test]
fn test_get_mem_slice_with_type_builtin_payload() {
let payload = get_mem_slice(SliceType::ShimPayload);
assert_eq!(payload.len(), TD_SHIM_PAYLOAD_SIZE as usize);
}

#[test]
#[should_panic(expected = "get_mem_slice: not support")]
fn test_get_mem_slice_with_type_payload() {
Expand Down Expand Up @@ -153,14 +143,6 @@ mod test {
assert_eq!(mailbox.len(), TD_SHIM_MAILBOX_SIZE as usize);
}

#[test]
#[should_panic(expected = "get_mem_slice_mut: read only")]
fn test_get_mem_slice_mut_with_type_builtin_payload() {
unsafe {
get_mem_slice_mut(SliceType::ShimPayload);
}
}

#[test]
#[should_panic(expected = "get_mem_slice_mut: read only")]
fn test_get_mem_slice_mut_with_type_config() {
Expand Down
27 changes: 16 additions & 11 deletions td-layout/src/runtime/exec.rs
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// Copyright (c) 2021 - 2023 Intel Corporation
// Copyright (c) 2021 - 2024 Intel Corporation
//
// SPDX-License-Identifier: BSD-2-Clause-Patent

Expand All @@ -10,40 +10,45 @@ Top of Low Memory: 0x80000000
+----------------------------------------+ <- 0x80000000
| EVENT_LOG | (0x100000) 1 MB
+----------------------------------------+ <- 0x7FF00000
| RELOCATED_MAILBOX | (0x2000) 8 KB
| RELOCATED_MAILBOX | (0x2000) 8 kB
+----------------------------------------+ <- 0x7FEFE000
| PAYLOAD_PAGE_TABLE | (0x20000) 128 KB
| PAYLOAD_PAGE_TABLE | (0x20000) 128 kB
+----------------------------------------+ <- 0x7FEDE000
| PAYLOAD | (0x2000000) 32 MB
+----------------------------------------+ <- 0x7DEDE000
| ACPI | (0x100000) 1 MB
+----------------------------------------+ <- 0x7DDDE000
| FREE | (0x7D5BE000) 1.96 GB
| FREE | (0x7C950000) 1.95 GB
+----------------------------------------+ <- 0x148E000
| PAYLOAD_IMAGE | (0xC6E000) 12.43 MB
+----------------------------------------+ <- 0x820000
| TD_HOB | (0x20000) 128 KB
| TD_HOB | (0x20000) 128 kB
+----------------------------------------+ <- 0x800000
| BOOTLOADER | (0x800000) 8 MB
+----------------------------------------+ <- 0x0
Total Usage: 0x2A42000 (42.26 MB)
Total Usage: 0x36B0000 (54.69 MB)
*/

pub const TOTAL_USAGE: usize = 0x2A42000; // (42.26 MB)
pub const TOTAL_USAGE: usize = 0x36B0000; // (54.69 MB)

// Runtime Layout Configuration
pub const BOOTLOADER_BASE: usize = 0x0;
pub const BOOTLOADER_SIZE: usize = 0x800000; // 8 MB
pub const TD_HOB_BASE: usize = 0x800000;
pub const TD_HOB_SIZE: usize = 0x20000; // 128 KB
pub const TD_HOB_SIZE: usize = 0x20000; // 128 kB
pub const PAYLOAD_IMAGE_BASE: usize = 0x820000;
pub const PAYLOAD_IMAGE_SIZE: usize = 0xC6E000; // 12.43 MB
pub const ACPI_SIZE: usize = 0x100000; // 1 MB
pub const PAYLOAD_SIZE: usize = 0x2000000; // 32 MB
pub const PAYLOAD_PAGE_TABLE_SIZE: usize = 0x20000; // 128 KB
pub const RELOCATED_MAILBOX_SIZE: usize = 0x2000; // 8 KB
pub const PAYLOAD_PAGE_TABLE_SIZE: usize = 0x20000; // 128 kB
pub const RELOCATED_MAILBOX_SIZE: usize = 0x2000; // 8 kB
pub const EVENT_LOG_SIZE: usize = 0x100000; // 1 MB

pub const MEMORY_LAYOUT_CONFIG: &[(&str, usize, &str)] = &[
pub const MEMORY_LAYOUT_CONFIG: &[(&'static str, usize, &'static str)] = &[
// (name of memory region, region size, region type)
("Bootloader", 0x800000, "Memory"),
("TdHob", 0x20000, "Memory"),
("ShimPayload", 0xC6E000, "Memory"),
("Acpi", 0x100000, "Acpi"),
("Payload", 0x2000000, "Reserved"),
("PayloadPageTable", 0x20000, "Reserved"),
Expand Down
30 changes: 19 additions & 11 deletions td-shim-tools/src/linker.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -10,11 +10,12 @@ use log::trace;
use r_efi::base::Guid;
use scroll::Pwrite;
use td_layout::build_time::{
TD_SHIM_FIRMWARE_BASE, TD_SHIM_FIRMWARE_SIZE, TD_SHIM_IPL_OFFSET, TD_SHIM_IPL_SIZE,
TD_SHIM_MAILBOX_OFFSET, TD_SHIM_METADATA_OFFSET, TD_SHIM_PAYLOAD_BASE, TD_SHIM_PAYLOAD_OFFSET,
TD_SHIM_PAYLOAD_SIZE, TD_SHIM_RESET_VECTOR_SIZE, TD_SHIM_SEC_CORE_INFO_OFFSET,
TD_SHIM_IMAGE_SIZE, TD_SHIM_IPL_BASE, TD_SHIM_IPL_OFFSET, TD_SHIM_IPL_SIZE,
TD_SHIM_MAILBOX_OFFSET, TD_SHIM_METADATA_OFFSET, TD_SHIM_PAYLOAD_OFFSET, TD_SHIM_PAYLOAD_SIZE,
TD_SHIM_RESET_VECTOR_OFFSET, TD_SHIM_RESET_VECTOR_SIZE, TD_SHIM_SEC_CORE_INFO_OFFSET,
};
use td_layout::mailbox::TdxMpWakeupMailbox;
use td_layout::runtime::exec::PAYLOAD_IMAGE_BASE;
use td_loader::{elf, pe};
use td_shim::fv::{
FvFfsFileHeader, FvFfsSectionHeader, FvHeader, IplFvFfsHeader, IplFvFfsSectionHeader,
Expand Down Expand Up @@ -156,7 +157,7 @@ pub fn build_ovmf_guid_table() -> Vec<u8> {
let mut table = Vec::new();

let metadata_offset =
TD_SHIM_FIRMWARE_SIZE - (TD_SHIM_METADATA_OFFSET + size_of::<TdxMetadataGuid>() as u32);
TD_SHIM_IMAGE_SIZE - (TD_SHIM_METADATA_OFFSET + size_of::<TdxMetadataGuid>() as u32);
let metadata_block_size = size_of::<u32>() + size_of::<u16>() + size_of::<Guid>();

// The data layout of the entry is:
Expand Down Expand Up @@ -279,7 +280,7 @@ impl TdShimLinker {
let reloc = pe::relocate(
&payload_bin.data,
&mut payload_reloc_buf,
TD_SHIM_PAYLOAD_BASE as usize,
PAYLOAD_IMAGE_BASE as usize,
)
.ok_or_else(|| {
io::Error::new(io::ErrorKind::Other, "Can not relocate payload content")
Expand Down Expand Up @@ -320,21 +321,28 @@ impl TdShimLinker {
0x100000
);
let entry_point = (reloc.0 - 0x100000) as u32;
let current_pos = output_file.current_pos()?;
let reset_vector_info = ResetVectorParams {
entry_point,
img_base: TD_SHIM_FIRMWARE_BASE + current_pos as u32,
img_base: TD_SHIM_IPL_BASE + size_of::<IplFvHeaderByte>() as u32,
img_size: ipl_bin.data.len() as u32,
};

output_file.write(&ipl_reloc_buf, "internal payload content")?;

let reset_vector_header = ResetVectorHeader::build_tdx_reset_vector_header();
output_file.write(reset_vector_header.as_bytes(), "reset vector header")?;
output_file.write(&reset_vector_bin.data, "reset vector content")?;
output_file.seek_and_write(
TD_SHIM_RESET_VECTOR_OFFSET as u64 - size_of::<ResetVectorHeader>() as u64,
reset_vector_header.as_bytes(),
"reset vector header",
)?;
output_file.seek_and_write(
TD_SHIM_RESET_VECTOR_OFFSET as u64,
&reset_vector_bin.data,
"reset vector content",
)?;

let current_pos = output_file.current_pos()?;
assert_eq!(current_pos, TD_SHIM_FIRMWARE_SIZE as u64);
assert_eq!(current_pos, TD_SHIM_IMAGE_SIZE as u64);

// Overwrite the ResetVectorParams and TdxMetadataPtr.
let pos = TD_SHIM_SEC_CORE_INFO_OFFSET as u64;
Expand All @@ -344,7 +352,7 @@ impl TdShimLinker {
let ovmf_guid_table = build_ovmf_guid_table();
assert_eq!(
ovmf_guid_table.len(),
(TD_SHIM_FIRMWARE_SIZE - TD_SHIM_SEC_CORE_INFO_OFFSET) as usize
(TD_SHIM_IMAGE_SIZE - TD_SHIM_SEC_CORE_INFO_OFFSET) as usize
- size_of::<ResetVectorParams>()
- 0x20
);
Expand Down
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