ResetVector: remove 5-level paging

5-level paging is not necessary in td-shim, remove the related code and page table entry in reset vector. As the level 5 entry is removed, update the size of `ResetVector` in image layout. Signed-off-by: Jiaqi Gao <[email protected]>
confidential-containers · Sep 11, 2024 · 5109752 · 5109752
1 parent 51833bd
commit 5109752
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Showing 4 changed files with 9 additions and 30 deletions.
diff --git a/devtools/td-layout-config/config_image.json b/devtools/td-layout-config/config_image.json
@@ -5,6 +5,6 @@
     "TempHeap": "0x020000",
     "Metadata": "0x001000",
     "Payload": "0xC2D000",
-    "Ipl": "0x349000",
-    "ResetVector": "0x008000"
+    "Ipl": "0x34A000",
+    "ResetVector": "0x007000"
 }
diff --git a/td-layout/src/build_time.rs b/td-layout/src/build_time.rs
@@ -21,9 +21,9 @@ Image Layout
 +----------------------------------------+ <- 0xCAE000
 |                METADATA                |   (0x1000) 4 kB
 +----------------------------------------+ <- 0xCAF000
-|                  IPL                   |   (0x349000) 3.29 MB
-+----------------------------------------+ <- 0xFF8000
-|              RESET_VECTOR              |   (0x8000) 32 kB
+|                  IPL                   |   (0x34A000) 3.29 MB
++----------------------------------------+ <- 0xFF9000
+|              RESET_VECTOR              |   (0x7000) 28 kB
 +----------------------------------------+ <- 0x1000000
 Image size: 0x1000000 (16 MB)
 */
@@ -52,10 +52,10 @@ pub const TD_SHIM_METADATA_OFFSET: u32 = 0xCAE000;
 pub const TD_SHIM_METADATA_SIZE: u32 = 0x1000; // 4 kB
 
 pub const TD_SHIM_IPL_OFFSET: u32 = 0xCAF000;
-pub const TD_SHIM_IPL_SIZE: u32 = 0x349000; // 3.29 MB
+pub const TD_SHIM_IPL_SIZE: u32 = 0x34A000; // 3.29 MB
 
-pub const TD_SHIM_RESET_VECTOR_OFFSET: u32 = 0xFF8000;
-pub const TD_SHIM_RESET_VECTOR_SIZE: u32 = 0x8000; // 32 kB
+pub const TD_SHIM_RESET_VECTOR_OFFSET: u32 = 0xFF9000;
+pub const TD_SHIM_RESET_VECTOR_SIZE: u32 = 0x7000; // 28 kB
 
 // Offset when Loading into Memory
 pub const TD_SHIM_FIRMWARE_BASE: u32 = 0xFF000000;
@@ -75,4 +75,4 @@ pub const TD_SHIM_FREE_BASE: u32 = 0xFF081000;
 pub const TD_SHIM_PAYLOAD_BASE: u32 = 0xFF081000;
 pub const TD_SHIM_METADATA_BASE: u32 = 0xFFCAE000;
 pub const TD_SHIM_IPL_BASE: u32 = 0xFFCAF000;
-pub const TD_SHIM_RESET_VECTOR_BASE: u32 = 0xFFFF8000;
+pub const TD_SHIM_RESET_VECTOR_BASE: u32 = 0xFFFF9000;
diff --git a/td-shim/ResetVector/Ia32/Flat32ToFlat64.asm b/td-shim/ResetVector/Ia32/Flat32ToFlat64.asm
@@ -16,29 +16,10 @@ Transition32FlatTo64Flat:
 
     mov     eax, cr4
     bts     eax, 5                      ; enable PAE
-
-    ;
-    ; esp [6:0] holds gpaw, if it is at least 52 bits, need to set
-    ; LA57 and use 5-level paging
-    ;
-    mov     ecx, esp
-    and     ecx, 0x2f
-    cmp     ecx, 52
-    jl      .set_cr4
-    bts     eax, 12
-.set_cr4:
     mov     cr4, eax
 
     mov     ecx, ADDR_OF(TopLevelPageDirectory)
-    ;
-    ; if we just set la57, we are ok, if using 4-level paging, adjust top-level page directory
-    ;
-    bt      eax, 12
-    jc      .set_cr3
-    add     ecx, 0x1000
-.set_cr3:
     mov     cr3, ecx
-
     mov     eax, cr0
     bts     eax, 31                     ; set PG
     mov     cr0, eax                    ; enable paging

diff --git a/td-shim/ResetVector/X64/PageTables.asm b/td-shim/ResetVector/X64/PageTables.asm
@@ -27,11 +27,9 @@ TopLevelPageDirectory:
     TIMES 511 DQ 0
 
     DQ      PDP(0x2000)
-    TIMES 511 DQ 0
     DQ      PDP(0x3000)
     DQ      PDP(0x4000)
     DQ      PDP(0x5000)
-    DQ      PDP(0x6000)
 
     ;
     ; Page Table Entries (2048 * 2MB entries => 4GB)