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mediatek: add support for FZS P3
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aiamadeus committed Dec 15, 2023
1 parent ed7014b commit 1cd3b4e
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268 changes: 268 additions & 0 deletions target/linux/mediatek/dts/mt7981b-fzs-5gcpe-p3.dts
Original file line number Diff line number Diff line change
@@ -0,0 +1,268 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

#include "mt7981.dtsi"

/ {
model = "FZS 5GCPE P3";
compatible = "fzs,5gcpe-p3", "mediatek,mt7981";

aliases {
serial0 = &uart0;
led-boot = &led_wifi;
led-upgrade = &led_wifi;
};

chosen {
stdout-path = "serial0:115200n8";
};

memory {
reg = <0 0x40000000 0 0x10000000>;
};

gpio-keys {
compatible = "gpio-keys";

reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};

wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
};
};

leds {
compatible = "gpio-leds";

led_wifi: wifi {
label = "green:wifi";
gpios = <&pio 15 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};

4g {
label = "green:4g";
gpios = <&pio 34 GPIO_ACTIVE_LOW>;
};

5g {
label = "green:5g";
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
};
};
};

&eth {
status = "okay";

gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";

nvmem-cells = <&macaddr_factory_2a>;
nvmem-cell-names = "mac-address";

fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};

&mdio_bus {
switch: switch@0 {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};

&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";

spi_nand@0 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;

spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;

mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;

partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

partition@0 {
label = "BL2";
reg = <0x000000 0x0100000>;
read-only;
};

partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x0080000>;
};

factory: partition@180000 {
label = "Factory";
reg = <0x180000 0x0200000>;
read-only;
};

partition@380000 {
label = "FIP";
reg = <0x380000 0x0200000>;
read-only;
};

partition@580000 {
label = "ubi";
reg = <0x580000 0x7000000>;
};
};
};
};

&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;

port@1 {
reg = <1>;
label = "lan1";
};

port@2 {
reg = <2>;
label = "lan2";
};

port@3 {
reg = <3>;
label = "wan";
nvmem-cells = <&macaddr_factory_24>;
nvmem-cell-names = "mac-address";
};

port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";

fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};

&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};

conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};

conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
};

uart1_pins: uart1-pins {
mux {
function = "uart";
groups = "uart1_1";
};
};

uart2_pins: uart2-pins {
mux {
function = "uart";
groups = "uart2_1";
};
};
};

&uart0 {
status = "okay";
};

&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay";
};

&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};

&usb_phy {
status = "okay";
};

&xhci {
status = "okay";
};

&watchdog {
status = "okay";
};

&wifi {
status = "okay";

mediatek,mtd-eeprom = <&factory 0x0>;
};

&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;

macaddr_factory_24: macaddr@24 {
reg = <0x24 0x6>;
};

macaddr_factory_2a: macaddr@2a {
reg = <0x2a 0x6>;
};
};
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@ mediatek_setup_interfaces()
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 sfp2" "eth1 wan"
;;
cetron,ct3003*|\
fzs,5gcpe-p3|\
jcg,q30-pro|\
qihoo,360t7)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan
Expand Down
18 changes: 14 additions & 4 deletions target/linux/mediatek/image/filogic.mk
Original file line number Diff line number Diff line change
Expand Up @@ -146,6 +146,20 @@ define Device/cetron_ct3003-mod
endef
TARGET_DEVICES += cetron_ct3003-mod

define Device/fzs_5gcpe-p3
DEVICE_VENDOR := FZS
DEVICE_MODEL := 5GCPE P3
DEVICE_DTS := mt7981b-fzs-5gcpe-p3
DEVICE_DTS_DIR := ../dts
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
KERNEL_IN_UBI := 1
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware kmod-usb3
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += fzs_5gcpe-p3

define Device/glinet_gl-mt2500
DEVICE_VENDOR := GL.iNet
DEVICE_MODEL := GL-MT2500
Expand Down Expand Up @@ -221,10 +235,6 @@ define Device/jdcloud_re-cs-05
DEVICE_DTS := mt7986a-jdcloud-re-cs-05
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := e2fsprogs f2fsck mkf2fs kmod-mt7986-firmware mt7986-wo-firmware
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += jdcloud_re-cs-05
Expand Down

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