mediatek: improve mt7981.dtsi

* re-factor WED components to boot fine also on limited loaders * add LEDs of integrated GE PHY Signed-off-by: Daniel Golle <[email protected]>
coolsnowwolf · Feb 23, 2024 · 5a1eaf2 · 5a1eaf2
1 parent 40bd975
commit 5a1eaf2
Show file tree

Hide file tree

Showing 2 changed files with 104 additions and 38 deletions.
diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981.dtsi b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/clock/mediatek,mt7981-clk.h>
 #include <dt-bindings/reset/mt7986-resets.h>
 #include <dt-bindings/pinctrl/mt65xx.h>
+#include <dt-bindings/leds/common.h>
 #include <dt-bindings/input/linux-event-codes.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/mux/mux.h>
@@ -184,21 +185,6 @@
 			reg = <0 0x47dc0000 0 0x240000>;
 			no-map;
 		};
-
-		wo_ilm0: wo-ilm@151e0000 {
-			reg = <0 0x151e0000 0 0x8000>;
-			no-map;
-		};
-
-		wo_dlm0: wo-dlm@151e8000 {
-			reg = <0 0x151e8000 0 0x2000>;
-			no-map;
-		};
-
-		wo_boot: wo-boot@15194000 {
-			reg = <0 0x15194000 0 0x1000>;
-			no-map;
-		};
 	};
 
 	psci {
@@ -425,6 +411,20 @@
 				drive-strength = <4>;
 			};
 		};
+
+		gbe_led0_pins: gbe-led0-pins {
+			mux {
+				function = "led";
+				groups = "gbe_led0";
+			};
+		};
+
+		gbe_led1_pins: gbe-led1-pins {
+			mux {
+				function = "led";
+				groups = "gbe_led1";
+			};
+		};
 	};
 
 	ethsys: syscon@15000000 {
@@ -445,11 +445,12 @@
 		reg = <0 0x15010000 0 0x1000>;
 		interrupt-parent = <&gic>;
 		interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
-		memory-region = <&wo_emi0>, <&wo_ilm0>, <&wo_dlm0>,
-				<&wo_data>, <&wo_boot>;
-		memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
-				      "wo-data", "wo-boot";
+		memory-region = <&wo_emi0>, <&wo_data>;
+		memory-region-names = "wo-emi", "wo-data";
 		mediatek,wo-ccif = <&wo_ccif0>;
+		mediatek,wo-ilm = <&wo_ilm0>;
+		mediatek,wo-dlm = <&wo_dlm0>;
+		mediatek,wo-cpuboot = <&wo_cpuboot>;
 	};
 
 	eth: ethernet@15100000 {
@@ -504,10 +505,42 @@
 				phy-is-integrated;
 				nvmem-cells = <&phy_calibration>;
 				nvmem-cell-names = "phy-cal-data";
+
+				leds {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					int_gbe_phy_led0: int-gbe-phy-led0@0 {
+						reg = <0>;
+						function = LED_FUNCTION_LAN;
+						status = "disabled";
+					};
+
+					int_gbe_phy_led1: int-gbe-phy-led1@1 {
+						reg = <1>;
+						function = LED_FUNCTION_LAN;
+						status = "disabled";
+					};
+				};
 			};
 		};
 	};
 
+	wo_dlm0: syscon@151e8000 {
+		compatible = "mediatek,mt7986-wo-dlm", "syscon";
+		reg = <0 0x151e8000 0 0x2000>;
+	};
+
+	wo_ilm0: syscon@151e0000 {
+		compatible = "mediatek,mt7986-wo-ilm", "syscon";
+		reg = <0 0x151e0000 0 0x8000>;
+	};
+
+	wo_cpuboot: syscon@15194000 {
+		compatible = "mediatek,mt7986-wo-cpuboot", "syscon";
+		reg = <0 0x15194000 0 0x1000>;
+	};
+
 	wo_ccif0: syscon@151a5000 {
 		compatible = "mediatek,mt7986-wo-ccif", "syscon";
 		reg = <0 0x151a5000 0 0x1000>;

diff --git a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/clock/mediatek,mt7981-clk.h>
 #include <dt-bindings/reset/mt7986-resets.h>
 #include <dt-bindings/pinctrl/mt65xx.h>
+#include <dt-bindings/leds/common.h>
 #include <dt-bindings/input/linux-event-codes.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/mux/mux.h>
@@ -191,21 +192,6 @@
 			reg = <0 0x47dc0000 0 0x240000>;
 			no-map;
 		};
-
-		wo_ilm0: wo-ilm@151e0000 {
-			reg = <0 0x151e0000 0 0x8000>;
-			no-map;
-		};
-
-		wo_dlm0: wo-dlm@151e8000 {
-			reg = <0 0x151e8000 0 0x2000>;
-			no-map;
-		};
-
-		wo_boot: wo-boot@15194000 {
-			reg = <0 0x15194000 0 0x1000>;
-			no-map;
-		};
 	};
 
 	psci {
@@ -432,6 +418,20 @@
 				drive-strength = <4>;
 			};
 		};
+
+		gbe_led0_pins: gbe-led0-pins {
+			mux {
+				function = "led";
+				groups = "gbe_led0";
+			};
+		};
+
+		gbe_led1_pins: gbe-led1-pins {
+			mux {
+				function = "led";
+				groups = "gbe_led1";
+			};
+		};
 	};
 
 	ethsys: syscon@15000000 {
@@ -452,11 +452,12 @@
 		reg = <0 0x15010000 0 0x1000>;
 		interrupt-parent = <&gic>;
 		interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
-		memory-region = <&wo_emi0>, <&wo_ilm0>, <&wo_dlm0>,
-				<&wo_data>, <&wo_boot>;
-		memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
-				      "wo-data", "wo-boot";
+		memory-region = <&wo_emi0>, <&wo_data>;
+		memory-region-names = "wo-emi", "wo-data";
 		mediatek,wo-ccif = <&wo_ccif0>;
+		mediatek,wo-ilm = <&wo_ilm0>;
+		mediatek,wo-dlm = <&wo_dlm0>;
+		mediatek,wo-cpuboot = <&wo_cpuboot>;
 	};
 
 	eth: ethernet@15100000 {
@@ -511,10 +512,42 @@
 				phy-is-integrated;
 				nvmem-cells = <&phy_calibration>;
 				nvmem-cell-names = "phy-cal-data";
+
+				leds {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					int_gbe_phy_led0: int-gbe-phy-led0@0 {
+						reg = <0>;
+						function = LED_FUNCTION_LAN;
+						status = "disabled";
+					};
+
+					int_gbe_phy_led1: int-gbe-phy-led1@1 {
+						reg = <1>;
+						function = LED_FUNCTION_LAN;
+						status = "disabled";
+					};
+				};
 			};
 		};
 	};
 
+	wo_dlm0: syscon@151e8000 {
+		compatible = "mediatek,mt7986-wo-dlm", "syscon";
+		reg = <0 0x151e8000 0 0x2000>;
+	};
+
+	wo_ilm0: syscon@151e0000 {
+		compatible = "mediatek,mt7986-wo-ilm", "syscon";
+		reg = <0 0x151e0000 0 0x8000>;
+	};
+
+	wo_cpuboot: syscon@15194000 {
+		compatible = "mediatek,mt7986-wo-cpuboot", "syscon";
+		reg = <0 0x15194000 0 0x1000>;
+	};
+
 	wo_ccif0: syscon@151a5000 {
 		compatible = "mediatek,mt7986-wo-ccif", "syscon";
 		reg = <0 0x151a5000 0 0x1000>;