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@karthikbhargavan
karthikbhargavan committed Apr 28, 2024
1 parent 2f41c2d commit 99dab65
Showing 1 changed file with 30 additions and 30 deletions.
60 changes: 30 additions & 30 deletions libcrux-ml-kem/src/simd/simd128.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -383,12 +383,12 @@ fn ntt_multiply(lhs: &SIMD128Vector, rhs: &SIMD128Vector, zeta0: i32, zeta1: i32

#[inline(always)]
fn serialize_1(v: SIMD128Vector) -> u8 {
let shifter0:[u32;4] = [0,1,2,3];
let shifter1:[u32;4] = [4,5,6,7];
let shifter0: [u32; 4] = [0, 1, 2, 3];
let shifter1: [u32; 4] = [4, 5, 6, 7];
let shift0 = unsafe { vld1q_s32(shifter0.as_ptr() as *const i32) };
let shift1 = unsafe { vld1q_s32(shifter1.as_ptr() as *const i32) };
let low = unsafe { vshlq_s32(v.low,shift0) };
let high = unsafe { vshlq_s32(v.high,shift1) };
let low = unsafe { vshlq_s32(v.low, shift0) };
let high = unsafe { vshlq_s32(v.high, shift1) };
let low = unsafe { vaddvq_s32(low) };
let high = unsafe { vaddvq_s32(high) };
(low | high) as u8
Expand All @@ -397,12 +397,12 @@ fn serialize_1(v: SIMD128Vector) -> u8 {
#[inline(always)]
fn deserialize_1(a: u8) -> SIMD128Vector {
let dup = unsafe { vdupq_n_s32(a as i32) };
let shifter0:[i32;4] = [0,-1,-2,-3];
let shifter1:[i32;4] = [-4,-5,-6,-7];
let shifter0: [i32; 4] = [0, -1, -2, -3];
let shifter1: [i32; 4] = [-4, -5, -6, -7];
let shift0 = unsafe { vld1q_s32(shifter0.as_ptr() as *const i32) };
let shift1 = unsafe { vld1q_s32(shifter1.as_ptr() as *const i32) };
let low = unsafe { vshlq_s32(dup,shift0) };
let high = unsafe { vshlq_s32(dup,shift1) };
let low = unsafe { vshlq_s32(dup, shift0) };
let high = unsafe { vshlq_s32(dup, shift1) };
SIMD128Vector {
low: unsafe { vandq_s32(low, vdupq_n_s32(1)) },
high: unsafe { vandq_s32(high, vdupq_n_s32(1)) },
Expand All @@ -411,15 +411,15 @@ fn deserialize_1(a: u8) -> SIMD128Vector {

#[inline(always)]
fn serialize_4(v: SIMD128Vector) -> [u8; 4] {
let shifter0:[i32;4] = [0,4,8,12];
let shifter1:[i32;4] = [16,20,24,28];
let shifter0: [i32; 4] = [0, 4, 8, 12];
let shifter1: [i32; 4] = [16, 20, 24, 28];
let shift0 = unsafe { vld1q_s32(shifter0.as_ptr() as *const i32) };
let shift1 = unsafe { vld1q_s32(shifter1.as_ptr() as *const i32) };
let lowt = unsafe { vshlq_s32(v.low, shift0) };
let hight = unsafe { vshlq_s32(v.high, shift1) };
let low = unsafe { vaddvq_s32(lowt) };
let high = unsafe { vaddvq_s32(hight) };
(low|high).to_le_bytes()
let lowt = unsafe { vshlq_s32(v.low, shift0) };
let hight = unsafe { vshlq_s32(v.high, shift1) };
let low = unsafe { vaddvq_s32(lowt) };
let high = unsafe { vaddvq_s32(hight) };
(low | high).to_le_bytes()
}

#[inline(always)]
Expand All @@ -433,16 +433,16 @@ fn deserialize_4(v: &[u8]) -> SIMD128Vector {
fn serialize_5(v: SIMD128Vector) -> [u8; 5] {
let lowt = unsafe { vtrn1q_s32(v.low, v.high) }; // a0, a4, a2, a6
let hight = unsafe { vtrn2q_s32(v.low, v.high) }; // a1, a5, a3, a7
let mixt = unsafe { vsliq_n_s32::<5>(lowt,hight) }; // a1a0, a5a4, a3a2, a7a6
let mixt = unsafe { vsliq_n_s32::<5>(lowt, hight) }; // a1a0, a5a4, a3a2, a7a6

let lowt = unsafe { vmovl_s32(vget_low_s32(mixt)) }; // a1a0, a5a4
let hight = unsafe { vmovl_s32(vget_high_s32(mixt)) }; // a3a2, a7a6
let mixt = unsafe { vsliq_n_s64::<10>(lowt,hight) }; // a3a2a1a0, a7a6a5a4
let mut result2 = [0i64;2];
let mixt = unsafe { vsliq_n_s64::<10>(lowt, hight) }; // a3a2a1a0, a7a6a5a4
let mut result2 = [0i64; 2];
unsafe { vst1q_s64(result2.as_mut_ptr() as *mut i64, mixt) };

let result_i64 = result2[0] | (result2[1] << 20);
let mut result = [0u8;5];
let mut result = [0u8; 5];
result.copy_from_slice(&result_i64.to_le_bytes()[0..5]);
result
}
Expand All @@ -458,19 +458,19 @@ fn deserialize_5(v: &[u8]) -> SIMD128Vector {
fn serialize_10(v: SIMD128Vector) -> [u8; 10] {
let lowt = unsafe { vtrn1q_s32(v.low, v.high) }; // a0, a4, a2, a6
let hight = unsafe { vtrn2q_s32(v.low, v.high) }; // a1, a5, a3, a7
let mixt = unsafe { vsliq_n_s32::<10>(lowt,hight) }; // a1a0, a5a4, a3a2, a7a6
let mixt = unsafe { vsliq_n_s32::<10>(lowt, hight) }; // a1a0, a5a4, a3a2, a7a6

let lowt = unsafe { vmovl_s32(vget_low_s32(mixt)) }; // a1a0, a5a4
let hight = unsafe { vmovl_s32(vget_high_s32(mixt)) }; // a3a2, a7a6
let mixt = unsafe { vsliq_n_s64::<20>(lowt,hight) };
let mixt = unsafe { vsliq_n_s64::<20>(lowt, hight) };

let index_arr:[u8;16] = [0,1,2,3,4,8,9,10,11,12,10,11,12,13,14,15];
let index_arr: [u8; 16] = [0, 1, 2, 3, 4, 8, 9, 10, 11, 12, 10, 11, 12, 13, 14, 15];
let index = unsafe { vld1q_u8(index_arr.as_ptr() as *const u8) };
let mixt = unsafe { vqtbl1q_u8(vreinterpretq_u8_s64(mixt),index)};
let mixt = unsafe { vqtbl1q_u8(vreinterpretq_u8_s64(mixt), index) };

let mut result16 = [0u8;16];
let mut result16 = [0u8; 16];
unsafe { vst1q_u8(result16.as_mut_ptr() as *mut u8, mixt) };
let mut result10 = [0u8;10];
let mut result10 = [0u8; 10];
result10.copy_from_slice(&result16[0..10]);
result10
}
Expand Down Expand Up @@ -499,15 +499,15 @@ fn deserialize_11(v: &[u8]) -> SIMD128Vector {
fn serialize_12(v: SIMD128Vector) -> [u8; 12] {
let lowt = unsafe { vtrn1q_s32(v.low, v.high) }; // a0, a4, a2, a6
let hight = unsafe { vtrn2q_s32(v.low, v.high) }; // a1, a5, a3, a7
let mixt = unsafe { vsliq_n_s32::<12>(lowt,hight) }; // a1a0, a5a4, a3a2, a7a6
let mixt = unsafe { vsliq_n_s32::<12>(lowt, hight) }; // a1a0, a5a4, a3a2, a7a6

let index_arr:[u8;16] = [0,1,2,8,9,10,4,5,6,12,13,14,12,13,14,15];
let index_arr: [u8; 16] = [0, 1, 2, 8, 9, 10, 4, 5, 6, 12, 13, 14, 12, 13, 14, 15];
let index = unsafe { vld1q_u8(index_arr.as_ptr() as *const u8) };
let mixt = unsafe { vqtbl1q_u8(vreinterpretq_u8_s32(mixt),index)};
let mixt = unsafe { vqtbl1q_u8(vreinterpretq_u8_s32(mixt), index) };

let mut result16 = [0u8;16];
let mut result16 = [0u8; 16];
unsafe { vst1q_u8(result16.as_mut_ptr() as *mut u8, mixt) };
let mut result12 = [0u8;12];
let mut result12 = [0u8; 12];
result12.copy_from_slice(&result16[0..12]);
result12
}
Expand Down

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