Add default mem blocks

desrdev · Mar 24, 2022 · f93d820 · f93d820
1 parent 850a489
commit f93d820
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Showing 13 changed files with 284 additions and 241 deletions.
diff --git a/.gradle/6.8/executionHistory/executionHistory.bin b/.gradle/6.8/executionHistory/executionHistory.bin
diff --git a/.gradle/6.8/executionHistory/executionHistory.lock b/.gradle/6.8/executionHistory/executionHistory.lock
diff --git a/.gradle/6.8/fileHashes/fileHashes.bin b/.gradle/6.8/fileHashes/fileHashes.bin
diff --git a/.gradle/6.8/fileHashes/fileHashes.lock b/.gradle/6.8/fileHashes/fileHashes.lock
diff --git a/.gradle/buildOutputCleanup/buildOutputCleanup.lock b/.gradle/buildOutputCleanup/buildOutputCleanup.lock
diff --git a/.gradle/buildOutputCleanup/outputFiles.bin b/.gradle/buildOutputCleanup/outputFiles.bin
diff --git a/data/languages/fr60.cspec b/data/languages/fr60.cspec
@@ -4,24 +4,32 @@
 
 <compiler_spec>
   <data_organization>
-	<pointer_size value="4"/>
-    <float_size value="4"/>
-    <double_size value="8"/>
-    <long_double_size value="8"/>
+    <absolute_max_alignment value="0" />
+    <machine_alignment value="2" />
+    <default_alignment value="1" />
+    <default_pointer_alignment value="2" />
+    <pointer_size value="4" />
+    <wchar_size value="2" />
+    <short_size value="2" />
+    <integer_size value="4" />
+    <float_size value="4" />
     <size_alignment_map>
       <entry size="1" alignment="1"/>
       <entry size="2" alignment="2"/>
       <entry size="4" alignment="4"/>
-      <entry size="8" alignment="8"/>
     </size_alignment_map>
   </data_organization>
   <global>
     <range space="ram"/>
   </global>
-  <stackpointer register="SP" space="ram" growth="negative"/>
+  <stackpointer register="SP" space="ram"/>
+  <returnaddress>
+    <register name="RP"/>
+  </returnaddress>
+  <funcptr align="2"/>
   <default_proto>
     <prototype name="fcc911" extrapop="0" stackshift="0" strategy="register">
-      <input>
+      <input killedbycall="true">
         <pentry minsize="1" maxsize="4">
           <register name="R4"/>
         </pentry>
@@ -46,11 +54,17 @@
           <addr space="join" piece1="R4" piece2="R5"/>
         </pentry>
       </output>
+      <killedbycall>
+        <register name="R0"/>
+        <register name="R1"/>
+        <register name="R2"/>
+        <register name="R3"/>
+        <register name="R12"/>
+        <register name="AC"/>        
+      </killedbycall>
       <unaffected>
         <register name="SP"/>
         <register name="FP"/>
-        <register name="SSP"/>
-        <register name="USP"/>
         <register name="R8"/>
         <register name="R9"/>
         <register name="R10"/>
@@ -59,7 +73,7 @@
     </prototype>
   </default_proto>
   <prototype name="syscall" extrapop="0" stackshift="0" strategy="register">
-    <input>
+    <input killedbycall="true">
       <pentry minsize="1" maxsize="4">
         <register name="R4"/>
       </pentry>
@@ -84,15 +98,19 @@
         <register name="AC"/>
       </pentry>
     </output>
-    <unaffected>
-      <register name="SP"/>
-      <register name="FP"/>
-      <register name="SSP"/>
-      <register name="USP"/>
-      <register name="R8"/>
-      <register name="R9"/>
-      <register name="R10"/>
-      <register name="R11"/>
-    </unaffected>
+      <killedbycall>
+        <register name="R0"/>
+        <register name="R1"/>
+        <register name="R2"/>
+        <register name="R3"/>    
+      </killedbycall>
+      <unaffected>
+        <register name="SP"/>
+        <register name="FP"/>
+        <register name="R8"/>
+        <register name="R9"/>
+        <register name="R10"/>
+        <register name="R11"/>
+      </unaffected>
   </prototype>
 </compiler_spec>
diff --git a/data/languages/fr60.dwarf b/data/languages/fr60.dwarf
@@ -0,0 +1,17 @@
+<dwarf>
+	<register_mappings>
+		<register_mapping dwarf="1" ghidra="R0" auto_count="12"/> <!-- R0..R11 -->
+		<register_mapping dwarf="12" ghidra="AC"/>
+		<register_mapping dwarf="13" ghidra="FP"/>
+		<register_mapping dwarf="14" ghidra="SP" stackpointer="true/>
+		<register_mapping dwarf="15" ghidra="PC"/>
+		<register_mapping dwarf="16" ghidra="RP"/>
+		<register_mapping dwarf="17" ghidra="SSP"/>
+		<register_mapping dwarf="18" ghidra="USP"/>
+		<register_mapping dwarf="19" ghidra="MDH"/>
+		<register_mapping dwarf="20" ghidra="MDL"/>
+		<register_mapping dwarf="21" ghidra="PS"/>
+		<register_mapping dwarf="22" ghidra="TBR"/>
+	</register_mappings>
+	<call_frame_cfa value="0"/>
+</dwarf>
diff --git a/data/languages/fr60.ldefs b/data/languages/fr60.ldefs
@@ -13,5 +13,6 @@
             id="fr60:BE:16:default">
     <description>Fujitsu FR 60 Instruction Set</description>
     <compiler name="fcc911" spec="fr60.cspec" id="fcc911"/>
+    <external_name tool="DWARF.register.mapping.file" name="fr60.dwarf"/>
   </language>
 </language_definitions>
diff --git a/data/languages/fr60.pspec b/data/languages/fr60.pspec
@@ -4,6 +4,13 @@
 
 <processor_spec>
   <programcounter register="PC"/>
+  <default_memory_blocks>
+    <memory_block name="io_direct_b" start_address="0x0" length="0x100" initialized="false" mode="rwvx"/>
+    <memory_block name="io" start_address="0x400" length="0xc00" initialized="false" mode="rwvx"/>
+    <memory_block name="int_ram" start_address="0x3f000" length="0x1000" initialized="false" mode="rwx"/>
+    <memory_block name="extern" start_address="0x400000" length="0xa00000" initialized="false" mode="rwx"/>
+    <memory_block name="int_rom" start_address="0xff000" length="0x1000" initialized="false" mode="rwvx"/>
+  </default_memory_blocks>
   <default_symbols>
     <!-- Memory IO setup registers -->
     <symbol name="ASR0" address="ram:640"/>