CRITICAL: Work on Peddle macros (added hooks for atomic CPU operations)

dirkwhoffmann · Oct 2, 2024 · 5b272ab · 5b272ab
1 parent d3d7af5
commit 5b272ab
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Showing 5 changed files with 44 additions and 8 deletions.
diff --git a/Emulator/Components/CPU/CPU.h b/Emulator/Components/CPU/CPU.h
@@ -122,6 +122,7 @@ class CPU final : public Peddle, public Inspectable<CPUInfo> {
 
         << reg.pc
         << reg.pc0
+        << reg.ir
         << reg.sp
         << reg.a
         << reg.x

diff --git a/Emulator/Components/CPU/Peddle/Peddle.h b/Emulator/Components/CPU/Peddle/Peddle.h
@@ -367,7 +367,6 @@ class Peddle : public SubComponent {
     template <CPURevision C> void writeStack(u8 sp, u8 value);
 
     template <CPURevision C> u16 readDasm(u16 addr) const;
-    // template <CPURevision C> u16 readResetVector();
 
 
     //
@@ -382,6 +381,21 @@ class Peddle : public SubComponent {
     virtual u16 readResetVector();
 
 
+    //
+    // Perforing atomic CPU operations
+    //
+
+    void latchIR(u8 value);
+    void latchADL(u8 value);
+    void latchADH(u8 value);
+    void latchIDL(u8 value);
+    void latchD(u8 value);
+    void latchPCL(u8 value);
+    void latchPCH(u8 value);
+    void latchP(u8 value);
+    void latchA(u8 value);
+
+
     //
     // Accessing the processor port
     //

diff --git a/Emulator/Components/CPU/Peddle/PeddleExec_cpp.h b/Emulator/Components/CPU/Peddle/PeddleExec_cpp.h
@@ -16,7 +16,18 @@
 
 // Read
 
-#define LATCH_INSTR(x) instr = (x)
+void Peddle::latchIR(u8 value) { reg.ir = value; }
+void Peddle::latchADL(u8 value) { reg.adl = value; }
+void Peddle::latchADH(u8 value) { reg.adh = value; }
+void Peddle::latchIDL(u8 value) { reg.idl = value; }
+void Peddle::latchD(u8 value) { reg.d = value; }
+void Peddle::latchPCL(u8 value) { reg.pc = (u16)((reg.pc & 0xff00) | (value)); }
+void Peddle::latchPCH(u8 value) { reg.pc = (u16)((reg.pc & 0x00ff) | (value) << 8); }
+void Peddle::latchP(u8 value) { setPWithoutB(value); }
+void Peddle::latchA(u8 value) { loadA(value); }
+
+/*
+#define LATCH_INSTR(x) reg.ir = (x)
 #define LATCH_ADL(x) reg.adl = (x)
 #define LATCH_ADH(x) reg.adh = (x)
 #define LATCH_IDL(x) reg.idl = (x)
@@ -25,8 +36,18 @@
 #define LATCH_PCH(x) reg.pc = (u16)((reg.pc & 0x00ff) | (x) << 8)
 #define LATCH_P(x) setPWithoutB(x)
 #define LATCH_A(x) loadA(x)
-
-#define FETCH_OPCODE \
+*/
+#define LATCH_INSTR(x) latchIR(x)
+#define LATCH_ADL(x) latchADL(x)
+#define LATCH_ADH(x) latchADH(x)
+#define LATCH_IDL(x) latchIDL(x)
+#define LATCH_D(x) latchD(x)
+#define LATCH_PCL(x) latchPCL(x)
+#define LATCH_PCH(x) latchPCH(x)
+#define LATCH_P(x) latchP(x)
+#define LATCH_A(x) latchA(x)
+
+#define FETCH_IR \
 if (likely(!rdyLine)) LATCH_INSTR(read<C>(reg.pc++)); else return;
 #define FETCH_ADDR_LO \
 if (likely(!rdyLine)) LATCH_ADL(reg.adl = read<C>(reg.pc++)); else return;
@@ -328,8 +349,6 @@ Peddle::execute()
 template <CPURevision C> void
 Peddle::execute()
 {
-    u8 instr;
-
     switch (next) {
 
         case fetch:
@@ -358,8 +377,8 @@ Peddle::execute()
             }
 
             // Execute the Fetch phase
-            FETCH_OPCODE
-            next = actionFunc[instr];
+            FETCH_IR
+            next = actionFunc[reg.ir];
             return;
 
             //

diff --git a/Emulator/Components/CPU/Peddle/PeddleMemory_cpp.h b/Emulator/Components/CPU/Peddle/PeddleMemory_cpp.h
@@ -144,3 +144,4 @@ Peddle::readPort() const
 {
     return (reg.pport.data & reg.pport.direction) | (externalPortBits() & ~reg.pport.direction);
 }
+
diff --git a/Emulator/Components/CPU/Peddle/PeddleTypes.h b/Emulator/Components/CPU/Peddle/PeddleTypes.h
@@ -402,6 +402,7 @@ typedef struct
     u16 pc;   // Program counter
     u16 pc0;  // Frozen program counter (beginning of current instruction)
 
+    u8 ir;    // Instruction register
     u8 sp;    // Stack pointer
 
     u8 a;     // Accumulator