Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[RISC-V] Fix some minor errors #107179

Merged
merged 10 commits into from
Oct 8, 2024
Merged

[RISC-V] Fix some minor errors #107179

Show file tree
Hide file tree
Changes from 6 commits
Commits
Show all changes
10 commits
Select commit Hold shift + click to select a range
b8ab2b2
[RISC-V] Fix minor errors
clamp03 Aug 30, 2024
8d8d85f
[RISC-V] Enable LegacyExceptionHandling for RISC-V
clamp03 Aug 30, 2024
5fcc9ff
Revert "[RISC-V] Enable LegacyExceptionHandling for RISC-V"
clamp03 Sep 3, 2024
deeffb6
[RISC-V] Disable ThreadStaticAccess Optimization
clamp03 Sep 3, 2024
fecdcb9
Merge branch 'main' into legacyexception
clamp03 Sep 5, 2024
43c270c
Merge branch 'main' into legacyexception
clamp03 Sep 13, 2024
0cc77c9
Revert "[RISC-V] Disable ThreadStaticAccess Optimization"
clamp03 Oct 8, 2024
c4e6b32
Merge remote-tracking branch 'main' into legacyexception
clamp03 Oct 8, 2024
7090560
Revert an assert
clamp03 Oct 8, 2024
83ba978
Delete Unused Codes in RISCV64 Unwinder
clamp03 Oct 8, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion src/coreclr/inc/regdisp.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -379,7 +379,7 @@ inline void SyncRegDisplayToCurrentContext(REGDISPLAY* pRD)

#if defined(TARGET_64BIT)
pRD->SP = (INT_PTR)GetSP(pRD->pCurrentContext);
pRD->ControlPC = INT_PTR(GetIP(pRD->pCurrentContext));
pRD->ControlPC = (INT_PTR)GetIP(pRD->pCurrentContext);
#elif defined(TARGET_ARM)
pRD->SP = (DWORD)GetSP(pRD->pCurrentContext);
pRD->ControlPC = (DWORD)GetIP(pRD->pCurrentContext);
Expand Down
7 changes: 4 additions & 3 deletions src/coreclr/jit/unwindriscv64.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -170,7 +170,6 @@ void Compiler::unwindSaveReg(regNumber reg, int offset)
}
#endif // FEATURE_CFI_SUPPORT
int z = offset / 8;
// assert(0 <= z && z <= 0xFF);

UnwindInfo* pu = &funCurrentFunc()->uwi;

Expand All @@ -183,6 +182,7 @@ void Compiler::unwindSaveReg(regNumber reg, int offset)

BYTE x = (BYTE)(reg - REG_RA);
assert(0 <= x && x <= 0x1B);
assert(0 <= z && z <= 0xFF);

pu->AddCode(0xD0, (BYTE)x, (BYTE)z);
}
Expand All @@ -194,6 +194,7 @@ void Compiler::unwindSaveReg(regNumber reg, int offset)

BYTE x = (BYTE)(reg - REG_F8);
assert(0 <= x && x <= 0x13);
assert(0 <= z && z <= 0xFFF);

pu->AddCode(0xDC | (BYTE)(x >> 4), (BYTE)(x << 4) | (BYTE)(z >> 8), (BYTE)z);
}
Expand Down Expand Up @@ -584,7 +585,7 @@ void DumpUnwindInfo(Compiler* comp,
getRegName(REG_F24 + x, true), getRegName(REG_F24 + x + 1, true), (z + 1) * 8);
}
#endif
else if ((b1 & 0xDC) == 0xDC)
else if ((b1 & 0xFE) == 0xDC)
{
// save_freg: 1101110x | xxxxzzzz | zzzzzzzz : save reg f(8 + #X) at [sp + #Z * 8], offset <= 2047
assert(i + 1 < countOfUnwindCodes);
Expand All @@ -593,7 +594,7 @@ void DumpUnwindInfo(Compiler* comp,
i += 2;

x = (DWORD)((b1 & 0x1) << 4) | (DWORD)(b2 >> 4);
z = ((DWORD)(2 & 0xF) << 8) | (DWORD)b3;
z = ((DWORD)(b2 & 0xF) << 8) | (DWORD)b3;

printf(" %02X %02X %02X save_freg X#%u Z#%u (0x%02X); fsd %s, [sp, #%u]\n", b1, b2, b3, x, z, z,
getRegName(REG_F8 + x), z * 8);
Expand Down
20 changes: 10 additions & 10 deletions src/coreclr/pal/inc/unixasmmacrosriscv64.inc
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -222,8 +222,12 @@ C_FUNC(\Name\()_End):
// GPR_a1
// GPR_a0
//
// General Registers:
// Callee Saved Registers:
// GPR_gp
// GPR_tp
// GPR_s11
// GPR_s10
// GPR_s9
// GPR_s8
// GPR_s7
// GPR_s6
Expand All @@ -232,7 +236,6 @@ C_FUNC(\Name\()_End):
// GPR_s3
// GPR_s2
// GPR_s1
// GPR_s0
// GPR_ra
// GPR_fp
//
Expand All @@ -256,11 +259,8 @@ C_FUNC(\Name\()_End):

__PWTB_FloatArgumentRegisters = \extraLocals

// Note, stack (see __PWTB_StackAlloc variable) must be 16 byte aligned,
// SIZEOF__FloatArgumentRegisters (0x40) is 16 byte aligned, that mean initial
// __PWTB_FloatArgumentRegisters value must be not 16 byte aligned and
// after add (120 + 64) provide 16 byte aligned result.
.if ((__PWTB_FloatArgumentRegisters % 16) == 0)
// Note, stack (see __PWTB_StackAlloc variable) must be 16 byte aligned.
.if ((__PWTB_FloatArgumentRegisters % 16) != 0)
__PWTB_FloatArgumentRegisters = __PWTB_FloatArgumentRegisters + 8
.endif

Expand All @@ -272,10 +272,10 @@ C_FUNC(\Name\()_End):


__PWTB_CalleeSavedRegisters = __PWTB_TransitionBlock
__PWTB_ArgumentRegisters = __PWTB_TransitionBlock + 120
__PWTB_ArgumentRegisters = __PWTB_TransitionBlock + 120 + 8

// Including fp, ra, s1-s11, tp, gp, and (a0-a7)arguments. (1+1+11+1+1)*8 + 8*8.
__PWTB_StackAlloc = __PWTB_TransitionBlock + 120 + 64
// Including fp, ra, s1-s11, tp, gp, padding and (a0-a7)arguments. (1+1+11+1+1)*8 + 8 + 8*8.
__PWTB_StackAlloc = __PWTB_TransitionBlock + 120 + 8 + 64
PROLOG_STACK_ALLOC __PWTB_StackAlloc
PROLOG_SAVE_REG_PAIR fp, ra, __PWTB_CalleeSavedRegisters, 1

Expand Down
6 changes: 3 additions & 3 deletions src/coreclr/pal/src/arch/riscv64/context2.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -139,7 +139,7 @@ LEAF_END RtlCaptureContext, _TEXT
//

LEAF_ENTRY CONTEXT_CaptureContext, _TEXT
PROLOG_STACK_ALLOC 24
PROLOG_STACK_ALLOC 32
sd t0, 0(sp)
sd t1, 8(sp)
sd t3, 16(sp)
Expand All @@ -149,7 +149,7 @@ LEAF_ENTRY CONTEXT_CaptureContext, _TEXT
and t3, t1, t0
bne t3, t0, LOCAL_LABEL(Done_CONTEXT_CONTROL)

addi t0, sp, 24
addi t0, sp, 32
sd fp, CONTEXT_Fp(a0)
sd t0, CONTEXT_Sp(a0)
sd ra, CONTEXT_Ra(a0)
Expand Down Expand Up @@ -243,6 +243,6 @@ LOCAL_LABEL(Done_CONTEXT_INTEGER):

LOCAL_LABEL(Done_CONTEXT_FLOATING_POINT):

EPILOG_STACK_FREE 24
EPILOG_STACK_FREE 32
ret
LEAF_END CONTEXT_CaptureContext, _TEXT
4 changes: 2 additions & 2 deletions ...tools/aot/ILCompiler.ReadyToRun/Compiler/DependencyAnalysis/ReadyToRun/TransitionBlock.cs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -715,8 +715,8 @@ private class RiscV64TransitionBlock : TransitionBlock
// fp=x8, ra=x1, s1-s11(R9,R18-R27), tp=x3, gp=x4
public override int NumCalleeSavedRegisters => 15;
// Callee-saves, argument registers
public override int SizeOfTransitionBlock => SizeOfCalleeSavedRegisters + SizeOfArgumentRegisters;
public override int OffsetOfFirstGCRefMapSlot => SizeOfCalleeSavedRegisters;
public override int SizeOfTransitionBlock => SizeOfCalleeSavedRegisters + PointerSize + SizeOfArgumentRegisters;
public override int OffsetOfFirstGCRefMapSlot => SizeOfCalleeSavedRegisters + PointerSize;
public override int OffsetOfArgumentRegisters => OffsetOfFirstGCRefMapSlot;

public override int OffsetOfFloatArgumentRegisters => 8 * sizeof(double);
Expand Down
5 changes: 3 additions & 2 deletions src/coreclr/unwinder/riscv64/unwinder.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -647,6 +647,7 @@ Return Value:
ULONG UnwindIndex;
ULONG UnwindWords;

assert(!"---------------RISCV64 ShouldNotReachHere");
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Delete this method instead?

Copy link
Member Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Oops. I want to put this into RtlpUnwindCustom not RtlpUnwindFunctionFull.
I will update unwinder.cpp and then I will request your review again.
Thank you.

//
// Unless a special frame is encountered, assume that any unwinding
// will return us to the return address of a call and set the flag
Expand Down Expand Up @@ -857,7 +858,7 @@ Return Value:
// alloc_m (11000xxx|xxxxxxxx): allocate large stack with size < 32k (2^11 * 16).
//

else if (CurCode <= 0xc7) {
else if ((CurCode & 0xf8) == 0xc0) {
if (AccumulatedSaveNexts != 0) {
return STATUS_UNWIND_INVALID_SEQUENCE;
}
Expand Down Expand Up @@ -890,7 +891,7 @@ Return Value:
// save_freg (1101110x|xxxxzzzz|zzzzzzzz): save reg f(8+#X) at [sp+#Z*8], offset <= 32767
//

else if ((CurCode & 0xdc) == 0xdc) {
else if ((CurCode & 0xfe) == 0xdc) {
if (AccumulatedSaveNexts != 0) {
return STATUS_UNWIND_INVALID_SEQUENCE;
}
Expand Down
4 changes: 2 additions & 2 deletions src/coreclr/vm/callingconvention.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -168,7 +168,7 @@ struct TransitionBlock
union {
CalleeSavedRegisters m_calleeSavedRegisters;
struct {
INT64 s0; // frame pointer
INT64 fp; // frame pointer
TADDR m_ReturnAddress;
INT64 s1;
INT64 s2;
Expand All @@ -185,7 +185,7 @@ struct TransitionBlock
INT64 gp;
};
};
//TADDR padding; // Keep size of TransitionBlock as multiple of 16-byte. Simplifies code in PROLOG_WITH_TRANSITION_BLOCK
TADDR padding; // Keep size of TransitionBlock as multiple of 16-byte. Simplifies code in PROLOG_WITH_TRANSITION_BLOCK
ArgumentRegisters m_argumentRegisters;
#else
PORTABILITY_ASSERT("TransitionBlock");
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/vm/frames.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1804,7 +1804,7 @@ class UnmanagedToManagedFrame : public Frame
static BYTE GetOffsetOfArgs()
{
LIMITED_METHOD_DAC_CONTRACT;
#if defined(TARGET_ARM) || defined(TARGET_ARM64)
#if defined(TARGET_ARM) || defined(TARGET_ARM64) || defined(TARGET_RISCV64)
size_t ofs = offsetof(UnmanagedToManagedFrame, m_argumentRegisters);
#else
size_t ofs = sizeof(UnmanagedToManagedFrame);
Expand Down
4 changes: 2 additions & 2 deletions src/coreclr/vm/riscv64/cgencpu.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -208,14 +208,14 @@ inline void SetRA( T_CONTEXT * context, TADDR ip) {
inline TADDR GetReg(T_CONTEXT * context, int Regnum)
{
LIMITED_METHOD_DAC_CONTRACT;
_ASSERTE(Regnum >= 0 && Regnum < 32 );
_ASSERTE(Regnum >= 0 && Regnum < 32);
return (TADDR)(&context->R0 + Regnum);
}

inline void SetReg(T_CONTEXT * context, int Regnum, PCODE RegContent)
{
LIMITED_METHOD_DAC_CONTRACT;
_ASSERTE(Regnum >= 0 && Regnum <=28 );
_ASSERTE(Regnum >= 0 && Regnum < 32);
*(&context->R0 + Regnum) = RegContent;
}

Expand Down
8 changes: 5 additions & 3 deletions src/coreclr/vm/threadstatics.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -620,7 +620,7 @@ void* GetThreadLocalStaticBase(TLSIndex index)
if (gcBaseAddresses.pTLSBaseAddress == (TADDR)NULL)
{
// Now we need to actually allocate the TLS data block
struct
struct
{
PTRARRAYREF ptrRef;
OBJECTREF tlsEntry;
Expand Down Expand Up @@ -732,9 +732,9 @@ void GetTLSIndexForThreadStatic(MethodTable* pMT, bool gcStatic, TLSIndex* pInde
alignment = 4;
else if (bytesNeeded >= 2)
alignment = 2;
else
else
alignment = 1;

uint32_t actualIndexOffset = AlignDown(indexOffsetWithoutAlignment, alignment);
uint32_t alignmentAdjust = indexOffsetWithoutAlignment - actualIndexOffset;
if (alignmentAdjust <= newBytesAvailable)
Expand Down Expand Up @@ -814,6 +814,8 @@ bool CanJITOptimizeTLSAccess()
// Optimization is disabled for linux musl arm64
#elif defined(TARGET_FREEBSD) && defined(TARGET_ARM64)
// Optimization is disabled for FreeBSD/arm64
#elif defined(TARGET_RISCV64)
// Optimization is disabled for riscv64
#elif defined(FEATURE_INTERPRETER)
// Optimization is disabled when interpreter may be used
#elif !defined(TARGET_OSX) && defined(TARGET_UNIX) && defined(TARGET_ARM64)
Expand Down
Loading