Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

riscv : add riscv qemu virt support and fix fs bit error in mstatus #416

Merged
merged 1 commit into from
Feb 13, 2025

Conversation

Jer6y
Copy link
Contributor

@Jer6y Jer6y commented Oct 25, 2024

Hi , I port threadx to qemu-riscv64-virt and run the demo

I also add toolchain cmake scripts , so we can use cmake like arm to generated libthreadx.a

To Test it

First , Maksure riscv64-unknown-elf- binutils and make is installed , and qemu-system-riscv64 is also required

cd into example_build work

cd ports/risc-v64/gnu/example_build/qemu_virt

use make to compile the demo (make clean can clean the output)

make

If done successfully, we will find A ELF FILE kernel.elf , use qemu to load it

qemu-system-riscv64 -nographic -smp 1 -bios none -m 128M -machine virt -kernel kernel.elf

If success , you will get different thread output the message like this

[UART0] : Uart Init Done, this is Test output!
[Thread] : thread_0_entry is here!
[Thread] : thread_5_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_2_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_0_entry is here!
[Thread] : thread_5_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_0_entry is here!
[Thread] : thread_5_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!

PR checklist

  • add riscv qemu virt support , add cmake toolchain script to generate libthreadx.a
  • fix riscv64 contex_resotre bug (when f/d isa is enable)
  • use weak symbol to invalidate _tx_initialize_low_level function

@fdesbiens
Copy link
Contributor

Hi @Jer6y.

Thank you for your contribution! I am the new Eclipse ThreadX project lead. I am still ramping up, so I couldn't comment right away. I appreciate your patience.

I lack the knowledge and experience to review the code thoroughly myself, so I will do my best to get someone else to look at it in the upcoming weeks. In the meantime, I am curious about the history of this contribution. What led you to write this port? Feel free to contact me privately if you cannot share those details publicly.

@fdesbiens
Copy link
Contributor

@eclipse-threadx/iot-threadx-committers, I need a volunteer with porting expertise to review this contribution.

@Jer6y
Copy link
Contributor Author

Jer6y commented Dec 6, 2024

Hi @Jer6y.

Thank you for your contribution! I am the new Eclipse ThreadX project lead. I am still ramping up, so I couldn't comment right away. I appreciate your patience.

I lack the knowledge and experience to review the code thoroughly myself, so I will do my best to get someone else to look at it in the upcoming weeks. In the meantime, I am curious about the history of this contribution. What led you to write this port? Feel free to contact me privately if you cannot share those details publicly.

Hi,
I am working on this porting task because I found that I can't directly use the ThreadX project on RISC-V. There are some issues with the code in terms of architecture code, and I can't find the way to run ThreadX on qemu-system-riscv64 for verification and learning.

@fdesbiens
Copy link
Contributor

@rahmanih I think you mentioned you have feedback for the author of this pull request. Can you please share it with them here?

@rahmanih
Copy link

@rahmanih I think you mentioned you have feedback for the author of this pull request. Can you please share it with them here?

Hi,
I misunderstood some points, but it is clear now, LGTM, if no more comments, these can be merged.
regards
Haithem.

@fdesbiens fdesbiens changed the base branch from master to dev January 28, 2025 21:25
@fdesbiens
Copy link
Contributor

@eclipse-threadx/iot-threadx-committers

@rahmanih Reviewed this contribution and determined it meets our quality standards.

I would like all the others to explicitly approve (+1) or reject (-1) this contribution. Please express your opinion by Tuesday, February 11, 2025. I will not vote myself unless there is a tie.

If the vote is positive, I will merge the code and this feature will ship with our next release.

@billlamiework
Copy link

+1

@fdesbiens
Copy link
Contributor

This contribution is approved. Thanks for submitting this PR, @Jer6y!

@fdesbiens fdesbiens merged commit e657568 into eclipse-threadx:dev Feb 13, 2025
1 check passed
@fdesbiens
Copy link
Contributor

This feature will ship in ThreadX v6.4.2. We expect to release it by the end of February 2025.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

4 participants