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Add ESP32-S2 alternate functions
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bugadani committed Nov 12, 2024
1 parent 6cb5d96 commit 356c137
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Showing 2 changed files with 21 additions and 20 deletions.
1 change: 1 addition & 0 deletions esp-hal/CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- `slave::Spi::{with_mosi(), with_miso(), with_sclk(), with_cs()}` functions (#2485)
- I8080: Added `set_8bits_order()` to set the byte order in 8-bit mode (#2487)
- `I2c::{apply_config(), with_sda(), with_scl()}` (#2477)
- ESP32-S2: Added missing GPIO alternate functions (#2512)

### Changed

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40 changes: 20 additions & 20 deletions esp-hal/src/soc/esp32s2/peripherals.rs
Original file line number Diff line number Diff line change
Expand Up @@ -79,19 +79,19 @@ crate::peripherals! {
(5, [Input, Output, Analog, RtcIo])
(6, [Input, Output, Analog, RtcIo])
(7, [Input, Output, Analog, RtcIo])
(8, [Input, Output, Analog, RtcIo])
(9, [Input, Output, Analog, RtcIo])
(10, [Input, Output, Analog, RtcIo])
(11, [Input, Output, Analog, RtcIo])
(12, [Input, Output, Analog, RtcIo])
(13, [Input, Output, Analog, RtcIo])
(14, [Input, Output, Analog, RtcIo])
(15, [Input, Output, Analog, RtcIo])
(16, [Input, Output, Analog, RtcIo])
(17, [Input, Output, Analog, RtcIo])
(18, [Input, Output, Analog, RtcIo])
(19, [Input, Output, Analog, RtcIo])
(20, [Input, Output, Analog, RtcIo])
(8, [Input, Output, Analog, RtcIo] ( ) ( 3 => SUBSPICS1 ))
(9, [Input, Output, Analog, RtcIo] ( 3 => SUBSPIHD 4 => FSPIHD ) ( 3 => SUBSPIHD 4 => FSPIHD ))
(10, [Input, Output, Analog, RtcIo] (2 => FSPIIO4 4 => FSPICS0) (2 => FSPIIO4 3 => SUBSPICS0 4 => FSPICS0))
(11, [Input, Output, Analog, RtcIo] (2 => FSPIIO5 3 => SUBSPID 4 => FSPID ) (2 => FSPIIO5 3 => SUBSPID 4 => FSPID ))
(12, [Input, Output, Analog, RtcIo] (2 => FSPIIO6 4 => FSPICLK) (2 => FSPIIO6 3 => SUBSPICLK 4 => FSPICLK))
(13, [Input, Output, Analog, RtcIo] (2 => FSPIIO7 3 => SUBSPIQ 4 => FSPIQ ) (2 => FSPIIO7 3 => SUBSPIQ 4 => FSPIQ ))
(14, [Input, Output, Analog, RtcIo] ( 3 => SUBSPIWP 4 => FSPIWP ) (2 => FSPIDQS 3 => SUBSPIWP 4 => FSPIWP ))
(15, [Input, Output, Analog, RtcIo] ( ) (2 => U0RTS))
(16, [Input, Output, Analog, RtcIo] (2 => U0CTS) ( ))
(17, [Input, Output, Analog, RtcIo] ( ) (2 => U1TXD))
(18, [Input, Output, Analog, RtcIo] (2 => U1RXD) ( ))
(19, [Input, Output, Analog, RtcIo] ( ) (2 => U1RTS))
(20, [Input, Output, Analog, RtcIo] (2 => U1CTS) ( ))
(21, [Input, Output, Analog, RtcIo])

(26, [Input, Output])
Expand All @@ -101,13 +101,13 @@ crate::peripherals! {
(30, [Input, Output])
(31, [Input, Output])
(32, [Input, Output])
(33, [Input, Output])
(34, [Input, Output])
(35, [Input, Output])
(36, [Input, Output])
(37, [Input, Output])
(38, [Input, Output])
(39, [Input, Output])
(33, [Input, Output] (2 => FSPIHD 3 => SUBSPIHD ) (2 => FSPIHD 3 => SUBSPIHD ))
(34, [Input, Output] (2 => FSPICS0 ) (2 => FSPICS0 3 => SUBSPICS0 ))
(35, [Input, Output] (2 => FSPID 3 => SUBSPID ) (2 => FSPID 3 => SUBSPID ))
(36, [Input, Output] (2 => FSPICLK ) (2 => FSPICLK 3 => SUBSPICLK ))
(37, [Input, Output] (2 => FSPIQ 3 => SUBSPIQ 4 => SPIDQS) (2 => FSPIQ 3 => SUBSPIQ 4 => SPIDQS))
(38, [Input, Output] (2 => FSPIWP 3 => SUBSPIWP ) (2 => FSPIWP 3 => SUBSPIWP ))
(39, [Input, Output] ( ) ( 3 => SUBSPICS1 ))
(40, [Input, Output])
(41, [Input, Output])
(42, [Input, Output])
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