Re-add packages to workspace

.vscode/settings.json.example

@@ -0,0 +1,25 @@
+{
+    // These are recommended settings.
+    // Should you wish to disable rust-analyzer, you can replace all of this with
+    // `"rust-analyzer.files.excludeDirs": ["."]`.
+    // You can also omit all this, but that will cause r-a to try
+    // (and after a long while, fail) initializing.
+    // Note that we are not telling rust-analyzer to use an embedded target.
+    // This results in a few pointer width related errors, but it also means r-a is able
+    // to cope with xtask and its dependencies.
+    "rust-analyzer.cargo.allTargets": false,
+    "rust-analyzer.cargo.targetDir": "target/rust-analyzer",
+    "rust-analyzer.procMacro.attributes.enable": false,
+    "rust-analyzer.cargo.features": [
+        "esp32c6",
+        "esp-hal/async",
+        "esp-hal/log",
+        "esp-hal-procmacros/has-lp-core",
+        "esp-backtrace/println",
+        "esp-backtrace/panic-handler",
+        "esp-backtrace/exception-handler",
+        "esp-println/uart",
+        "esp-println/log",
+    ],
+    "editor.formatOnSave": true,
+}

Cargo.toml

@@ -1,11 +1,11 @@
 [workspace]
 resolver = "2"
-members  = ["xtask"]
-exclude  = [
+members  = [
+    "xtask",
+    "esp-hal",
     "esp-alloc",
     "esp-backtrace",
     "esp-build",
-    "esp-hal",
     "esp-hal-embassy",
     "esp-hal-procmacros",
     "esp-hal-smartled",
@@ -20,8 +20,19 @@ exclude  = [
     "extras/bench-server",
     "extras/esp-wifishark",
     "extras/ieee802154-sniffer",
+]
+exclude = [
     "hil-test",
     "xtensa-lx",
     "xtensa-lx-rt",
     "xtensa-lx-rt/procmacros",
 ]
+
+[profile.release]
+codegen-units    = 1
+debug            = 2
+debug-assertions = false
+incremental      = false
+opt-level        = 3
+lto = 'fat'
+overflow-checks  = false

esp-lp-hal/.cargo/config.toml

@@ -1,7 +1,7 @@
 [alias]
 esp32c6 = "build --release --examples --features=esp32c6 --target riscv32imac-unknown-none-elf"
-esp32s2 = "build --release --example=blinky --features=esp32s2 --target riscv32imc-unknown-none-elf"
-esp32s3 = "build --release --example=blinky --features=esp32s3 --target riscv32imc-unknown-none-elf"
+esp32s2 = "build --release --example=lp_blinky --features=esp32s2 --target riscv32imc-unknown-none-elf"
+esp32s3 = "build --release --example=lp_blinky --features=esp32s3 --target riscv32imc-unknown-none-elf"
 
 [build]
 # target = "riscv32imc-unknown-none-elf"  # ESP32-S2 + ESP32-S3

esp-lp-hal/Cargo.toml

@@ -73,15 +73,15 @@ embedded-hal = ["dep:embedded-hal", "dep:embedded-hal-nb"]
 embedded-io = ["dep:embedded-io"]
 
 [[example]]
-name              = "blinky"
+name              = "lp_blinky"
 required-features = ["embedded-hal-02"]
 
 [[example]]
-name              = "i2c"
+name              = "lp_i2c"
 required-features = ["embedded-hal-02", "esp32c6"]
 
 [[example]]
-name              = "uart"
+name              = "lp_uart"
 required-features = ["embedded-hal-02", "esp32c6"]
 
 [lints.rust]

examples/Cargo.toml

@@ -80,12 +80,3 @@ embassy-generic-timers = ["embassy-time/generic-queue-8"]
 
 opsram-2m = ["esp-hal/opsram-2m"]
 psram-2m  = ["esp-hal/psram-2m"]
-
-[profile.release]
-codegen-units    = 1
-debug            = 2
-debug-assertions = false
-incremental      = false
-opt-level        = 3
-lto = 'fat'
-overflow-checks  = false

examples/src/bin/lp_core_basic.rs

@@ -36,7 +36,7 @@ fn main() -> ! {
 
     // load code to LP core
     let lp_core_code =
-        load_lp_code!("../esp-lp-hal/target/riscv32imac-unknown-none-elf/release/examples/blinky");
+        load_lp_code!("../target/riscv32imac-unknown-none-elf/release/examples/lp_blinky");
 
     // start LP core
     lp_core_code.run(&mut lp_core, LpCoreWakeupSource::HpCpu, lp_pin);

examples/src/bin/lp_core_i2c.rs

@@ -41,7 +41,7 @@ fn main() -> ! {
 
     // load code to LP core
     let lp_core_code =
-        load_lp_code!("../esp-lp-hal/target/riscv32imac-unknown-none-elf/release/examples/i2c");
+        load_lp_code!("../target/riscv32imac-unknown-none-elf/release/examples/lp_i2c");
 
     // start LP core
     lp_core_code.run(&mut lp_core, LpCoreWakeupSource::HpCpu, lp_i2c);

examples/src/bin/lp_core_uart.rs

@@ -59,7 +59,7 @@ fn main() -> ! {
 
     // Load code to LP core:
     let lp_core_code =
-        load_lp_code!("../esp-lp-hal/target/riscv32imac-unknown-none-elf/release/examples/uart");
+        load_lp_code!("../target/riscv32imac-unknown-none-elf/release/examples/lp_uart");
 
     // Start LP core:
     lp_core_code.run(&mut lp_core, LpCoreWakeupSource::HpCpu, lp_uart);

examples/src/bin/ulp_riscv_core_basic.rs

@@ -37,7 +37,7 @@ fn main() -> ! {
 
     // load code to LP core
     let lp_core_code =
-        load_lp_code!("../esp-lp-hal/target/riscv32imc-unknown-none-elf/release/examples/blinky");
+        load_lp_code!("../target/riscv32imc-unknown-none-elf/release/examples/lp_blinky");
 
     // start LP core
     lp_core_code.run(&mut ulp_core, ulp_core::UlpCoreWakeupSource::HpCpu, pin);

xtask/src/lib.rs

@@ -144,10 +144,10 @@ pub fn build_documentation(
 
     let docs_path = windows_safe_path(
         &workspace
-            .join(package.to_string())
             .join("target")
             .join(target)
-            .join("doc"),
+            .join("doc")
+            .join(package.to_string().replace('-', "_")),
     );
 
     Ok(docs_path)