Merge branch 'main' into twai-async

esp-rs · Jan 6, 2024 · a72fb02 · a72fb02
2 parents 3143b8c + cf66cc0
commit a72fb02
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diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
@@ -157,6 +157,9 @@ jobs:
           cargo check --examples --features=embassy,embassy-time-timg0,embassy-executor-interrupt,embassy-executor-thread,log
       - name: check esp32-hal (psram)
         run: cd esp32-hal/ && cargo check --example=psram --features=psram-2m --release # This example requires release!
+      # Make sure we can build without default features enabled, too!
+      - name: check esp32-hal (no default features)
+        run: cd esp32-hal/ && cargo build --no-default-features --features=xtal-40mhz
       # Ensure documentation can be built
       - name: rustdoc
         run: cd esp32-hal/ && cargo doc --features=eh1
@@ -209,6 +212,9 @@ jobs:
           cd esp32c2-hal/
           cargo +nightly check --examples --features=embassy,embassy-time-timg0,embassy-executor-thread,defmt
           cargo +nightly check --examples --features=embassy,embassy-time-timg0,embassy-executor-thread,log
+      # Make sure we can build without default features enabled, too!
+      - name: check esp32c2-hal (no default features)
+        run: cd esp32c2-hal/ && cargo build --no-default-features --features=xtal-40mhz
       # Ensure documentation can be built
       - name: rustdoc
         run: cd esp32c2-hal/ && cargo doc --features=eh1
@@ -263,6 +269,9 @@ jobs:
           cd esp32c3-hal/
           cargo +nightly check --examples --features=embassy,embassy-time-timg0,embassy-executor-thread,defmt
           cargo +nightly check --examples --features=embassy,embassy-time-timg0,embassy-executor-thread,log
+      # Make sure we can build without default features enabled, too!
+      - name: check esp32c3-hal (no default features)
+        run: cd esp32c3-hal/ && cargo build --no-default-features
       # Ensure documentation can be built
       - name: rustdoc
         run: cd esp32c3-hal/ && cargo doc --features=eh1
@@ -328,6 +337,9 @@ jobs:
           cd esp32c6-hal/
           cargo +nightly check --examples --features=embassy,embassy-time-timg0,embassy-executor-thread,defmt
           cargo +nightly check --examples --features=embassy,embassy-time-timg0,embassy-executor-thread,log
+      # Make sure we can build without default features enabled, too!
+      - name: check esp32c6-hal (no default features)
+        run: cd esp32c6-hal/ && cargo build --no-default-features
       # Ensure documentation can be built
       - name: rustdoc
         run: cd esp32c6-hal/ && cargo doc --features=eh1
@@ -408,6 +420,9 @@ jobs:
           cd esp32h2-hal/
           cargo +nightly check --examples --features=embassy,embassy-time-timg0,embassy-executor-thread,defmt
           cargo +nightly check --examples --features=embassy,embassy-time-timg0,embassy-executor-thread,log
+      # Make sure we can build without default features enabled, too!
+      - name: check esp32h2-hal (no default features)
+        run: cd esp32h2-hal/ && cargo build --no-default-features
       # Ensure documentation can be built
       - name: rustdoc
         run: cd esp32h2-hal/ && cargo doc --features=eh1
@@ -483,6 +498,9 @@ jobs:
           cargo +esp check --examples --features=embassy,embassy-time-timg0,embassy-executor-interrupt,embassy-executor-thread,log
       - name: check esp32s2-hal (psram)
         run: cd esp32s2-hal/ && cargo +esp check --example=psram --features=psram-2m --release # This example requires release!
+      # Make sure we can build without default features enabled, too!
+      - name: check esp32s2-hal (no default features)
+        run: cd esp32s2-hal/ && cargo build --no-default-features
       # Ensure documentation can be built
       - name: rustdoc
         run: cd esp32s2-hal/ && cargo +esp doc --features=eh1
@@ -565,6 +583,9 @@ jobs:
           cd esp32s3-hal/
           cargo +esp check --examples --features=embassy,embassy-time-timg0,embassy-executor-interrupt,embassy-executor-thread,defmt
           cargo +esp check --examples --features=embassy,embassy-time-timg0,embassy-executor-interrupt,embassy-executor-thread,log
+      # Make sure we can build without default features enabled, too!
+      - name: check esp32s3-hal (no default features)
+        run: cd esp32s3-hal/ && cargo build --no-default-features
       # Ensure documentation can be built
       - name: rustdoc
         run: cd esp32s3-hal/ && cargo doc --features=eh1

diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -14,11 +14,15 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - ESP32-C6: Properly initialize PMU (#974)
 - Implement overriding base mac address (#1044)
 - Added async support for TWAI (#951)
+- Add `rt-riscv` and `rt-xtensa` features to enable/disable runtime support (#1057)
+- ESP32-C6: Implement deep sleep (#918)
 
 ### Changed
 
 ### Fixed
 
+- ESP32: correct gpio 32/33 in errata36() (#1053)
+
 ### Removed
 
 ## [0.14.1] - 2023-12-13

diff --git a/esp-hal-common/Cargo.toml b/esp-hal-common/Cargo.toml
@@ -48,7 +48,8 @@ embassy-sync       = { version = "0.5.0", optional = true }
 embassy-time       = { version = "0.2.0", optional = true }
 
 # RISC-V
-esp-riscv-rt = { version = "0.6.0", optional = true, path = "../esp-riscv-rt" }
+riscv        = { version = "0.10.1", optional = true }
+esp-riscv-rt = { version = "0.6.0",  optional = true, path = "../esp-riscv-rt" }
 
 # Xtensa
 xtensa-lx    = { version = "0.8.0",  optional = true }
@@ -73,18 +74,22 @@ basic-toml = "0.1.7"
 serde      = { version = "1.0.193", features = ["derive"] }
 
 [features]
-esp32   = ["xtensa", "esp32/rt",   "procmacros/esp32",   "xtensa-lx/esp32",   "xtensa-lx-rt/esp32"]
-esp32c2 = ["riscv",  "esp32c2/rt", "procmacros/esp32c2", "portable-atomic/unsafe-assume-single-core"]
-esp32c3 = ["riscv",  "esp32c3/rt", "procmacros/esp32c3", "portable-atomic/unsafe-assume-single-core"]
-esp32c6 = ["riscv",  "esp32c6/rt", "procmacros/esp32c6"]
-esp32h2 = ["riscv",  "esp32h2/rt", "procmacros/esp32h2"]
-esp32s2 = ["xtensa", "esp32s2/rt", "procmacros/esp32s2", "xtensa-lx/esp32s2", "xtensa-lx-rt/esp32s2", "usb-otg", "portable-atomic/critical-section"]
-esp32s3 = ["xtensa", "esp32s3/rt", "procmacros/esp32s3", "xtensa-lx/esp32s3", "xtensa-lx-rt/esp32s3", "usb-otg"]
+esp32   = ["dep:esp32",   "xtensa", "procmacros/esp32",   "xtensa-lx/esp32",   "xtensa-lx-rt?/esp32"]
+esp32c2 = ["dep:esp32c2", "riscv",  "procmacros/esp32c2", "portable-atomic/unsafe-assume-single-core"]
+esp32c3 = ["dep:esp32c3", "riscv",  "procmacros/esp32c3", "portable-atomic/unsafe-assume-single-core"]
+esp32c6 = ["dep:esp32c6", "riscv",  "procmacros/esp32c6"]
+esp32h2 = ["dep:esp32h2", "riscv",  "procmacros/esp32h2"]
+esp32s2 = ["dep:esp32s2", "xtensa", "procmacros/esp32s2", "xtensa-lx/esp32s2", "xtensa-lx-rt?/esp32s2", "usb-otg", "portable-atomic/critical-section"]
+esp32s3 = ["dep:esp32s3", "xtensa", "procmacros/esp32s3", "xtensa-lx/esp32s3", "xtensa-lx-rt?/esp32s3", "usb-otg"]
 
 # Crystal frequency selection (ESP32 and ESP32-C2 only!)
 xtal-26mhz = []
 xtal-40mhz = []
 
+# Runetime support
+rt-riscv  = ["esp-riscv-rt/zero-bss", "esp32c2?/rt", "esp32c3?/rt", "esp32c6?/rt", "esp32h2?/rt"]
+rt-xtensa = ["dep:xtensa-lx-rt", "esp32?/rt", "esp32s2?/rt", "esp32s3?/rt"]
+
 # Only certain chips support flip-link (ESP32-C6 and ESPS32-H2)
 flip-link = ["esp-riscv-rt/fix-sp"]
 
@@ -150,7 +155,7 @@ embassy-generic-queue-64  = ["embassy-time/generic-queue-64"]
 embassy-generic-queue-128 = ["embassy-time/generic-queue-128"]
 
 # Architecture-specific features (intended for internal use)
-riscv  = ["critical-section/restore-state-u8", "esp-riscv-rt", "esp-riscv-rt/zero-bss"]
+riscv  = ["dep:riscv", "critical-section/restore-state-u8"]
 xtensa = ["critical-section/restore-state-u32"]
 
 # Initialize / clear data sections and RTC memory