Merge branch 'main' into yanshay_fix_lcd_cam_i8080_sending_garbage_try2

esp-hal/CHANGELOG.md

@@ -14,7 +14,6 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - `Delay::delay(time: fugit::MicrosDurationU64)`
 - Added async support for TWAI (#1320)
 - Add TWAI support for ESP32-C6 (#1323)
-- `interrupt::enable` now has a direct CPU enable counter part, `interrupt::enable_direct` (#1310)
 
 ### Fixed
 
@@ -26,6 +25,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - ESP32 & ESP32-S2: Fix I²C frequency (#1306)
 - Fixed LCD_CAM i8080 potentially sending garbage to display (#1301)
 - ESP32: Apply fix for Errata 3.6 in all the places necessary. (#1315)
+- ESP32 & ESP32-S2: Fix I²C frequency (#1306)
 
 ### Changed
 
@@ -36,7 +36,6 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - Enable `embedded-hal` feature by default, instead of the `embedded-hal-02` feature (#1313)
 - `Uart` structs now take a `Mode` parameter which defines how the driver is initialized (#1294)
 - `Rmt` can be created in async or blocking mode. The blocking constructor takes an optional interrupt handler argument. (#1341)
-- Enable `embedded-hal` feature by default, instead of the `embedded-hal-02` feature (#1313)
 
 ### Removed
 

esp-hal/build.rs

@@ -7,45 +7,9 @@ use std::{
     str::FromStr,
 };
 
+use esp_build::assert_unique_used_features;
 use esp_metadata::{Chip, Config};
 
-// Macros taken from:
-// https://github.com/TheDan64/inkwell/blob/36c3b10/src/lib.rs#L81-L110
-
-// Given some features, assert that AT MOST one of the features is enabled.
-macro_rules! assert_unique_features {
-    () => {};
-
-    ( $first:tt $(,$rest:tt)* ) => {
-        $(
-            #[cfg(all(feature = $first, feature = $rest))]
-            compile_error!(concat!("Features \"", $first, "\" and \"", $rest, "\" cannot be used together"));
-        )*
-        assert_unique_features!($($rest),*);
-    };
-}
-
-// Given some features, assert that AT LEAST one of the features is enabled.
-macro_rules! assert_used_features {
-    ( $all:tt ) => {
-        #[cfg(not(feature = $all))]
-        compile_error!(concat!("The feature flag must be provided: ", $all));
-    };
-
-    ( $($all:tt),+ ) => {
-        #[cfg(not(any($(feature = $all),*)))]
-        compile_error!(concat!("One of the feature flags must be provided: ", $($all, ", "),*));
-    };
-}
-
-// Given some features, assert that EXACTLY one of the features is enabled.
-macro_rules! assert_unique_used_features {
-    ( $($all:tt),* ) => {
-        assert_unique_features!($($all),*);
-        assert_used_features!($($all),*);
-    }
-}
-
 fn main() -> Result<(), Box<dyn Error>> {
     // NOTE: update when adding new device support!
     // Ensure that exactly one chip has been specified:

esp-hal/src/interrupt/riscv.rs

@@ -440,119 +440,119 @@ mod vectored {
 
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_1_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt1(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt1, context)
     }
 
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_2_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt2(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt2, context)
     }
 
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_3_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt3(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt3, context)
     }
 
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_4_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt4(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt4, context)
     }
 
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_5_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt5(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt5, context)
     }
 
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_6_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt6(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt6, context)
     }
 
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_7_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt7(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt7, context)
     }
 
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_8_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt8(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt8, context)
     }
 
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_9_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt9(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt9, context)
     }
 
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_10_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt10(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt10, context)
     }
 
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_11_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt11(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt11, context)
     }
 
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_12_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt12(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt12, context)
     }
 
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_13_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt13(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt13, context)
     }
 
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_14_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt14(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt14, context)
     }
 
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_15_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt15(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt15, context)
     }
 
     #[cfg(plic)]
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_16_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt16(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt16, context)
     }
 
     #[cfg(plic)]
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_17_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt17(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt17, context)
     }
 
     #[cfg(plic)]
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_18_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt18(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt18, context)
     }
 
     #[cfg(plic)]
     #[no_mangle]
     #[ram]
-    unsafe fn cpu_int_19_handler(context: &mut TrapFrame) {
+    unsafe fn interrupt19(context: &mut TrapFrame) {
         handle_interrupts(CpuInterrupt::Interrupt19, context)
     }
 }

esp-hal/src/interrupt/xtensa.rs

@@ -68,6 +68,21 @@ pub const RESERVED_INTERRUPTS: &[usize] = &[
     CpuInterrupt::Interrupt22EdgePriority3 as _,
 ];
 
+pub(crate) fn setup_interrupts() {
+    // disable all known interrupts
+    // at least after the 2nd stage bootloader there are some interrupts enabled
+    // (e.g. UART)
+    for peripheral_interrupt in 0..255 {
+        crate::soc::peripherals::Interrupt::try_from(peripheral_interrupt)
+            .map(|intr| {
+                #[cfg(multi_core)]
+                disable(Cpu::AppCpu, intr);
+                disable(Cpu::ProCpu, intr);
+            })
+            .ok();
+    }
+}
+
 /// Enable an interrupt by directly binding it to a available CPU interrupt
 ///
 /// Unless you are sure, you most likely want to use [`enable`] with the

esp-hal/src/rng.rs

@@ -63,8 +63,6 @@
 //! rng.read(&mut buffer).unwrap();
 //! ```
 
-#[cfg(feature = "embedded-hal-02")]
-use core::convert::Infallible;
 use core::marker::PhantomData;
 
 use crate::{peripheral::Peripheral, peripherals::RNG};

examples/src/bin/twai.rs

@@ -11,7 +11,8 @@
 //!
 //! `IS_FIRST_SENDER` below must be set to false on one of the ESP's
 
-//% CHIPS: esp32c3 esp32s3
+
+//% CHIPS: esp32c3 esp32c6 esp32s2 esp32s3
 //% FEATURES: embedded-hal
 
 #![no_std]