Merge branch 'main' into camera

.github/workflows/hil.yml

@@ -17,27 +17,23 @@ env:
   CARGO_TERM_COLOR: always
 
 jobs:
-  hil:
-    name: HIL Test | ${{ matrix.target.soc }}
-    runs-on:
-      labels: [self-hosted, "${{ matrix.target.runner }}"]
+  build-tests:
+    name: Build Tests | ${{ matrix.target.soc }}
+    runs-on: ubuntu-latest
+
     strategy:
       fail-fast: false
       matrix:
         target:
           # RISC-V devices:
-          - soc: esp32c3
-            runner: rustboard
-            rust-target: riscv32imc-unknown-none-elf
+          # - soc: esp32c3
+          #   rust-target: riscv32imc-unknown-none-elf
           - soc: esp32c6
-            runner: esp32c6-usb
-            rust-target: riscv32imac-unknown-none-elf
-          - soc: esp32h2
-            runner: esp32h2-usb
             rust-target: riscv32imac-unknown-none-elf
-          # Xtensa devices:
-          - soc: esp32s3
-            runner: esp32s3-usb
+          # - soc: esp32h2
+          #   rust-target: riscv32imac-unknown-none-elf
+          # # Xtensa devices:
+          # - soc: esp32s3
     steps:
       - uses: actions/checkout@v4
         if: github.event_name != 'workflow_dispatch'
@@ -64,4 +60,59 @@ jobs:
           ldproxy: false
 
       - name: Run tests
-        run: cargo xtask run-tests ${{ matrix.target.soc }}
+        run: cargo xtask build-tests ${{ matrix.target.soc }}
+
+      - name: Prepare artifact
+        run: |
+          # Create the 'tests' directory if it doesn't exist
+          mkdir -p tests
+
+          # Find ELF files in the specified path and move them to 'tests'
+          find "hil-test/target/${{ matrix.target.rust-target }}/release/deps/" -type f -exec file {} + | \
+          grep ELF | \
+          awk -F: '{print $1}' | \
+          xargs -I {} mv {} tests
+
+          # Rename files in 'tests' by removing everything after the first dash
+          for file in tests/*-*; do
+            base_name="$(basename "$file" | cut -d'-' -f1)"
+            mv "$file" "tests/$base_name"
+          done
+
+      - uses: actions/upload-artifact@v4
+        with:
+          name: tests-${{ matrix.target.soc }}
+          path: /home/runner/work/esp-hal/esp-hal/tests
+          if-no-files-found: error
+
+  hil:
+    name: HIL Test | ${{ matrix.target.soc }}
+    needs: build-tests
+    runs-on:
+      labels: [self-hosted, "${{ matrix.target.runner }}"]
+    strategy:
+      fail-fast: false
+      matrix:
+        target:
+          # RISC-V devices:
+          # - soc: esp32c3
+          #   runner: rustboard
+          - soc: esp32c6
+            runner: esp32c6-usb
+          # - soc: esp32h2
+          #   runner: esp32h2-usb
+          # # Xtensa devices:
+          # - soc: esp32s3
+          #   runner: esp32s3-usb
+    steps:
+      - uses: actions/download-artifact@v4
+        with:
+          name: tests-${{ matrix.target.soc }}
+          path: tests
+      - name: Run tests
+        run: |
+          export PATH=$PATH:/home/espressif/.cargo/bin
+          for file in "tests"/*; do
+            probe-rs run --chip ${{ matrix.target.soc }} "$file"
+          done
+

esp-alloc/src/lib.rs

@@ -97,10 +97,12 @@ impl EspHeap {
     ///
     /// # Safety
     ///
-    /// Obey these or Bad Stuff will happen.
-    ///
+    /// - The supplied memory region must be available for the entire program (a
+    ///   `'static` lifetime).
+    /// - The supplied memory region must be exclusively available to the heap
+    ///   only, no aliasing.
     /// - This function must be called exactly ONCE.
-    /// - `size > 0`
+    /// - `size > 0`.
     pub unsafe fn init(&self, heap_bottom: *mut u8, size: usize) {
         critical_section::with(|cs| self.heap.borrow(cs).borrow_mut().init(heap_bottom, size));
     }

esp-hal-procmacros/src/lib.rs

@@ -507,7 +507,7 @@ pub fn entry(args: TokenStream, input: TokenStream) -> TokenStream {
         FoundCrate::Itself => quote!(esp_lp_hal),
         FoundCrate::Name(name) => {
             let ident = Ident::new(&name, Span::call_site());
-            quote!( #ident::Something )
+            quote!( #ident )
         }
     };
 

esp-hal-smartled/src/lib.rs

@@ -11,7 +11,7 @@
 //! ## Example
 //!
 //! ```rust,ignore
-//! let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
+//! let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
 //! let rmt = Rmt::new(peripherals.RMT, 80.MHz(), &clocks).unwrap();
 //!
 //! let rmt_buffer = smartLedBuffer!(1);

esp-hal/CHANGELOG.md

@@ -9,12 +9,20 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ### Added
 
+- ESP32-PICO-V3-02: Initial support (#1155)
 - ESP32-S3: Add LCD_CAM Camera driver (#1483)
 
 ### Fixed
 
+- i2c: i2c1_handler used I2C0 register block by mistake (#1487)
+
 ### Changed
 
+- Removed unneeded generic parameters on `Usb` (#1469)
+- Created virtual peripherals for CPU control and radio clocks, rather than splitting them from `SYSTEM` (#1428)
+- `IO`, `ADC`, `DAC`, `RTC*`, `LEDC`, `PWM` and `PCNT` drivers have been converted to camel case format (#1473)
+- RNG is no longer TRNG, the `CryptoRng` implementation has been removed. To track this being re-added see #1499 (#1498)
+
 ### Removed
 
 ## [0.17.0] - 2024-04-18
@@ -53,6 +61,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - Fixed writes to SPI not flushing before attempting to write, causing corrupted writes (#1381)
 - fix AdcConfig::adc_calibrate for xtensa targets (#1379)
 - Fixed a divide by zero panic when setting the LEDC duty cycle to 0 with `SetDutyCycle::set_duty_cycle` (#1403)
+- Fix for issue #1419. Removed ESP32 specific code for resolutions > 16 bit in ledc embedded_hal::pwm max_duty_cycle function. 
+- Fix for issue #1419. Fixed division by zero in ledc embedded_hal::pwm set_duty_cycle function and converted to set_duty_hw instead of set_duty to eliminate loss of granularity.
 - Support 192 and 256-bit keys for AES (#1316)
 - Fixed MCPWM DeadTimeCfg bit values (#1378)
 - ESP32 LEDC `set_duty_cycle` used HighSpeedChannel for LowSpeedChannel (#1457)

esp-hal/src/aes/mod.rs

@@ -124,7 +124,7 @@ pub enum Key {
     /// 128-bit AES key
     Key16([u8; 16]),
     /// 192-bit AES key
-    #[cfg(any(feature = "esp32", feature = "esp32s2"))]
+    #[cfg(any(esp32, esp32s2))]
     Key24([u8; 24]),
     /// 256-bit AES key
     Key32([u8; 32]),
@@ -137,7 +137,7 @@ impl From<[u8; 16]> for Key {
     }
 }
 
-#[cfg(any(feature = "esp32", feature = "esp32s2"))]
+#[cfg(any(esp32, esp32s2))]
 impl From<[u8; 24]> for Key {
     fn from(key: [u8; 24]) -> Self {
         Key::Key24(key)
@@ -155,7 +155,7 @@ impl Key {
     fn as_slice(&self) -> &[u8] {
         match self {
             Key::Key16(ref key) => key,
-            #[cfg(any(feature = "esp32", feature = "esp32s2"))]
+            #[cfg(any(esp32, esp32s2))]
             Key::Key24(ref key) => key,
             Key::Key32(ref key) => key,
         }

esp-hal/src/analog/adc/esp32.rs

@@ -192,13 +192,13 @@ impl RegisterAccess for ADC2 {
 }
 
 /// Analog-to-Digital Converter peripheral driver.
-pub struct ADC<'d, ADC> {
+pub struct Adc<'d, ADC> {
     _adc: PeripheralRef<'d, ADC>,
     attenuations: [Option<Attenuation>; NUM_ATTENS],
     active_channel: Option<u8>,
 }
 
-impl<'d, ADCI> ADC<'d, ADCI>
+impl<'d, ADCI> Adc<'d, ADCI>
 where
     ADCI: RegisterAccess,
 {
@@ -270,7 +270,7 @@ where
             .sar_read_ctrl2()
             .modify(|_, w| w.sar2_data_inv().set_bit());
 
-        ADC {
+        Adc {
             _adc: adc_instance.into_ref(),
             attenuations: config.attenuations,
             active_channel: None,
@@ -323,7 +323,7 @@ where
     }
 }
 
-impl<'d, ADC1> ADC<'d, ADC1> {
+impl<'d, ADC1> Adc<'d, ADC1> {
     pub fn enable_hall_sensor() {
         // Connect hall sensor
         unsafe { &*RTC_IO::ptr() }
@@ -341,7 +341,7 @@ impl<'d, ADC1> ADC<'d, ADC1> {
 
 #[cfg(feature = "embedded-hal-02")]
 impl<'d, ADCI, PIN> embedded_hal_02::adc::OneShot<ADCI, u16, super::AdcPin<PIN, ADCI>>
-    for ADC<'d, ADCI>
+    for Adc<'d, ADCI>
 where
     PIN: embedded_hal_02::adc::Channel<ADCI, ID = u8> + super::AdcChannel,
     ADCI: RegisterAccess,

esp-hal/src/analog/adc/riscv.rs

@@ -397,13 +397,13 @@ impl super::CalibrationAccess for crate::peripherals::ADC2 {
 }
 
 /// Analog-to-Digital Converter peripheral driver.
-pub struct ADC<'d, ADCI> {
+pub struct Adc<'d, ADCI> {
     _adc: PeripheralRef<'d, ADCI>,
     attenuations: [Option<Attenuation>; NUM_ATTENS],
     active_channel: Option<u8>,
 }
 
-impl<'d, ADCI> ADC<'d, ADCI>
+impl<'d, ADCI> Adc<'d, ADCI>
 where
     ADCI: RegisterAccess + 'd,
 {
@@ -426,7 +426,7 @@ where
                 .bits(0b11)
         });
 
-        ADC {
+        Adc {
             _adc: adc_instance.into_ref(),
             attenuations: config.attenuations,
             active_channel: None,
@@ -540,7 +540,7 @@ impl super::AdcCalEfuse for crate::peripherals::ADC2 {
 
 #[cfg(feature = "embedded-hal-02")]
 impl<'d, ADCI, PIN, CS> embedded_hal_02::adc::OneShot<ADCI, u16, super::AdcPin<PIN, ADCI, CS>>
-    for ADC<'d, ADCI>
+    for Adc<'d, ADCI>
 where
     PIN: embedded_hal_02::adc::Channel<ADCI, ID = u8> + super::AdcChannel,
     ADCI: RegisterAccess,

esp-hal/src/analog/adc/xtensa.rs

@@ -401,13 +401,13 @@ impl super::CalibrationAccess for crate::peripherals::ADC2 {
 }
 
 /// Analog-to-Digital Converter peripheral driver.
-pub struct ADC<'d, ADC> {
+pub struct Adc<'d, ADC> {
     _adc: PeripheralRef<'d, ADC>,
     active_channel: Option<u8>,
     last_init_code: u16,
 }
 
-impl<'d, ADCI> ADC<'d, ADCI>
+impl<'d, ADCI> Adc<'d, ADCI>
 where
     ADCI: RegisterAccess,
 {
@@ -481,7 +481,7 @@ where
             .sar_amp_ctrl2()
             .modify(|_, w| unsafe { w.sar_amp_wait3().bits(1) });
 
-        ADC {
+        Adc {
             _adc: adc_instance.into_ref(),
             active_channel: None,
             last_init_code: 0,
@@ -605,7 +605,7 @@ impl super::AdcCalEfuse for crate::peripherals::ADC2 {
 
 #[cfg(feature = "embedded-hal-02")]
 impl<'d, ADCI, PIN, CS> embedded_hal_02::adc::OneShot<ADCI, u16, AdcPin<PIN, ADCI, CS>>
-    for ADC<'d, ADCI>
+    for Adc<'d, ADCI>
 where
     PIN: embedded_hal_02::adc::Channel<ADCI, ID = u8> + AdcChannel,
     ADCI: RegisterAccess,

esp-hal/src/analog/dac.rs

@@ -12,12 +12,12 @@
 //! ## Example
 //!
 //! ```no_run
-//! let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
+//! let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
 //! let gpio25 = io.pins.gpio25.into_analog();
 //! let gpio26 = io.pins.gpio26.into_analog();
 //!
-//! let mut dac1 = DAC1::new(peripherals.DAC1, gpio25);
-//! let mut dac2 = DAC2::new(peripherals.DAC2, gpio26);
+//! let mut dac1 = Dac1::new(peripherals.DAC1, gpio25);
+//! let mut dac2 = Dac2::new(peripherals.DAC2, gpio26);
 //!
 //! let mut delay = Delay::new(&clocks);
 //!
@@ -53,11 +53,11 @@ cfg_if::cfg_if! {
 }
 
 /// Digital-to-Analog Converter (DAC) Channel 1
-pub struct DAC1<'d> {
+pub struct Dac1<'d> {
     _inner: PeripheralRef<'d, peripherals::DAC1>,
 }
 
-impl<'d> DAC1<'d> {
+impl<'d> Dac1<'d> {
     /// Constructs a new DAC instance.
     pub fn new(dac: impl Peripheral<P = peripherals::DAC1> + 'd, _pin: Dac1Gpio) -> Self {
         crate::into_ref!(dac);
@@ -90,11 +90,11 @@ impl<'d> DAC1<'d> {
 }
 
 /// Digital-to-Analog Converter (DAC) Channel 2
-pub struct DAC2<'d> {
+pub struct Dac2<'d> {
     _inner: PeripheralRef<'d, peripherals::DAC2>,
 }
 
-impl<'d> DAC2<'d> {
+impl<'d> Dac2<'d> {
     /// Constructs a new DAC instance.
     pub fn new(dac: impl Peripheral<P = peripherals::DAC2> + 'd, _pin: Dac2Gpio) -> Self {
         crate::into_ref!(dac);

esp-hal/src/embassy/mod.rs

@@ -41,7 +41,7 @@
 //! #[cfg(feature = "embassy-time-timg0")]
 //! embassy::init(&clocks, timer_group0.timer0);
 //!
-//! let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
+//! let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
 //! // GPIO 9 as input
 //! let input = io.pins.gpio9.into_pull_down_input();
 //!

esp-hal/src/etm.rs

@@ -22,7 +22,7 @@
 //!
 //! ## Example
 //! ```no_run
-//! let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
+//! let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
 //! let mut led = io.pins.gpio1.into_push_pull_output();
 //! let button = io.pins.gpio9.into_pull_down_input();
 //!

esp-hal/src/gpio/lp_io.rs

@@ -15,7 +15,7 @@
 //!
 //! # Example
 //! ```no_run
-//! let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
+//! let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
 //! // configure GPIO 1 as LP output pin
 //! let lp_pin = io.pins.gpio1.into_low_power().into_push_pull_output();
 //! ```
@@ -180,7 +180,7 @@ macro_rules! lp_gpio {
                     }
                 }
 
-                impl<MODE> $crate::gpio::RTCPin for GpioPin<MODE, $gpionum> {
+                impl<MODE> $crate::gpio::RtcPin for GpioPin<MODE, $gpionum> {
                     unsafe fn apply_wakeup(&mut self, wakeup: bool, level: u8) {
                         let lp_io = &*$crate::peripherals::LP_IO::ptr();
                         lp_io.[< pin $gpionum >]().modify(|_, w| {
@@ -232,7 +232,7 @@ macro_rules! lp_gpio {
                     }
                 }
 
-                impl<MODE> $crate::gpio::RTCPinWithResistors for GpioPin<MODE, $gpionum> {
+                impl<MODE> $crate::gpio::RtcPinWithResistors for GpioPin<MODE, $gpionum> {
                     fn rtcio_pullup(&mut self, enable: bool) {
                         let lp_io = unsafe { &*$crate::peripherals::LP_IO::ptr() };
                         lp_io.[< gpio $gpionum >]().modify(|_, w| w.fun_wpu().bit(enable));