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[DMA 5/8]: Clean up macros #2527

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Nov 22, 2024
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62 changes: 45 additions & 17 deletions esp-hal/src/dma/gdma.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,8 @@

use crate::{
dma::*,
interrupt::Priority,
macros::handler,
peripheral::{Peripheral, PeripheralRef},
peripherals::Interrupt,
system::{self, PeripheralClockControl},
Expand Down Expand Up @@ -564,7 +566,7 @@ impl<CH: DmaChannel, M: Mode> Channel<'_, M, CH> {
}

macro_rules! impl_channel {
($num:literal, $interrupt_in:ident, $async_handler:path $(, $interrupt_out:ident , $async_handler_out:path)? ) => {
($num:literal, $interrupt_in:ident $(, $interrupt_out:ident)? ) => {
paste::paste! {
/// A description of a specific GDMA channel
#[non_exhaustive]
Expand Down Expand Up @@ -593,15 +595,43 @@ macro_rules! impl_channel {

impl [<DmaChannel $num>] {
fn handler_in() -> Option<InterruptHandler> {
Some($async_handler)
$crate::if_set! {
$({
// $interrupt_out is present, meaning we have split handlers
#[handler(priority = Priority::max())]
fn interrupt_handler_in() {
$crate::ignore!($interrupt_out);
super::asynch::handle_in_interrupt::<[< DmaChannel $num >]>();
}
Some(interrupt_handler_in)
})?,
{
#[handler(priority = Priority::max())]
fn interrupt_handler() {
super::asynch::handle_in_interrupt::<[< DmaChannel $num >]>();
super::asynch::handle_out_interrupt::<[< DmaChannel $num >]>();
}
Some(interrupt_handler)
}
}
}

fn isr_in() -> Option<Interrupt> {
Some(Interrupt::$interrupt_in)
}

fn handler_out() -> Option<InterruptHandler> {
$crate::if_set! { $(Some($async_handler_out))?, None }
$crate::if_set! {
$({
#[handler(priority = Priority::max())]
fn interrupt_handler_out() {
$crate::ignore!($interrupt_out);
super::asynch::handle_out_interrupt::<[< DmaChannel $num >]>();
}
Some(interrupt_handler_out)
})?,
None
}
}

fn isr_out() -> Option<Interrupt> {
Expand Down Expand Up @@ -653,29 +683,27 @@ macro_rules! impl_channel {
};
}

use super::asynch::interrupt as asynch_handler;

cfg_if::cfg_if! {
if #[cfg(esp32c2)] {
const CHANNEL_COUNT: usize = 1;
impl_channel!(0, DMA_CH0, asynch_handler::interrupt_handler_ch0);
impl_channel!(0, DMA_CH0);
} else if #[cfg(esp32c3)] {
const CHANNEL_COUNT: usize = 3;
impl_channel!(0, DMA_CH0, asynch_handler::interrupt_handler_ch0);
impl_channel!(1, DMA_CH1, asynch_handler::interrupt_handler_ch1);
impl_channel!(2, DMA_CH2, asynch_handler::interrupt_handler_ch2);
impl_channel!(0, DMA_CH0);
impl_channel!(1, DMA_CH1);
impl_channel!(2, DMA_CH2);
} else if #[cfg(any(esp32c6, esp32h2))] {
const CHANNEL_COUNT: usize = 3;
impl_channel!(0, DMA_IN_CH0, asynch_handler::interrupt_handler_in_ch0, DMA_OUT_CH0, asynch_handler::interrupt_handler_out_ch0);
impl_channel!(1, DMA_IN_CH1, asynch_handler::interrupt_handler_in_ch1, DMA_OUT_CH1, asynch_handler::interrupt_handler_out_ch1);
impl_channel!(2, DMA_IN_CH2, asynch_handler::interrupt_handler_in_ch2, DMA_OUT_CH2, asynch_handler::interrupt_handler_out_ch2);
impl_channel!(0, DMA_IN_CH0, DMA_OUT_CH0);
impl_channel!(1, DMA_IN_CH1, DMA_OUT_CH1);
impl_channel!(2, DMA_IN_CH2, DMA_OUT_CH2);
} else if #[cfg(esp32s3)] {
const CHANNEL_COUNT: usize = 5;
impl_channel!(0, DMA_IN_CH0, asynch_handler::interrupt_handler_in_ch0, DMA_OUT_CH0, asynch_handler::interrupt_handler_out_ch0);
impl_channel!(1, DMA_IN_CH1, asynch_handler::interrupt_handler_in_ch1, DMA_OUT_CH1, asynch_handler::interrupt_handler_out_ch1);
impl_channel!(2, DMA_IN_CH2, asynch_handler::interrupt_handler_in_ch2, DMA_OUT_CH2, asynch_handler::interrupt_handler_out_ch2);
impl_channel!(3, DMA_IN_CH3, asynch_handler::interrupt_handler_in_ch3, DMA_OUT_CH3, asynch_handler::interrupt_handler_out_ch3);
impl_channel!(4, DMA_IN_CH4, asynch_handler::interrupt_handler_in_ch4, DMA_OUT_CH4, asynch_handler::interrupt_handler_out_ch4);
impl_channel!(0, DMA_IN_CH0, DMA_OUT_CH0);
impl_channel!(1, DMA_IN_CH1, DMA_OUT_CH1);
impl_channel!(2, DMA_IN_CH2, DMA_OUT_CH2);
impl_channel!(3, DMA_IN_CH3, DMA_OUT_CH3);
impl_channel!(4, DMA_IN_CH4, DMA_OUT_CH4);
}
}

Expand Down
79 changes: 2 additions & 77 deletions esp-hal/src/dma/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3032,7 +3032,7 @@ pub(crate) mod asynch {
}
}

fn handle_in_interrupt<CH: DmaChannelExt>() {
pub(super) fn handle_in_interrupt<CH: DmaChannelExt>() {
let rx = CH::rx_interrupts();

if !rx.is_async() {
Expand Down Expand Up @@ -3068,7 +3068,7 @@ pub(crate) mod asynch {
}
}

fn handle_out_interrupt<CH: DmaChannelExt>() {
pub(super) fn handle_out_interrupt<CH: DmaChannelExt>() {
let tx = CH::tx_interrupts();

if !tx.is_async() {
Expand Down Expand Up @@ -3097,79 +3097,4 @@ pub(crate) mod asynch {
tx.waker().wake()
}
}

#[cfg(gdma)]
pub(crate) mod interrupt {
use super::*;
use crate::{interrupt::Priority, macros::handler};

// Single interrupt handler for IN and OUT
#[cfg(any(esp32c2, esp32c3))]
macro_rules! interrupt_handler {
($ch:literal) => {
paste::paste! {
#[handler(priority = Priority::max())]
pub(crate) fn [<interrupt_handler_ch $ch>]() {
handle_in_interrupt::<[< DmaChannel $ch >]>();
handle_out_interrupt::<[< DmaChannel $ch >]>();
}
}
};
}

#[cfg(not(any(esp32c2, esp32c3)))]
macro_rules! interrupt_handler {
($ch:literal) => {
paste::paste! {
#[handler(priority = Priority::max())]
pub(crate) fn [<interrupt_handler_in_ch $ch>]() {
handle_in_interrupt::<[< DmaChannel $ch >]>();
}

#[handler(priority = Priority::max())]
pub(crate) fn [<interrupt_handler_out_ch $ch>]() {
handle_out_interrupt::<[< DmaChannel $ch >]>();
}
}
};
}

interrupt_handler!(0);
#[cfg(not(esp32c2))]
interrupt_handler!(1);
#[cfg(not(esp32c2))]
interrupt_handler!(2);
#[cfg(esp32s3)]
interrupt_handler!(3);
#[cfg(esp32s3)]
interrupt_handler!(4);
}

#[cfg(pdma)]
pub(crate) mod interrupt {
use super::*;
use crate::{interrupt::Priority, macros::handler};

// Single interrupt handler for IN and OUT
macro_rules! interrupt_handler {
($ch:ident) => {
paste::paste! {
#[handler(priority = Priority::max())]
pub(crate) fn [<interrupt_handler_ $ch:lower _dma>]() {
handle_in_interrupt::<[< $ch DmaChannel >]>();
handle_out_interrupt::<[< $ch DmaChannel >]>();
}
}
};
}

interrupt_handler!(Spi2);
#[cfg(spi3)]
interrupt_handler!(Spi3);

#[cfg(i2s0)]
interrupt_handler!(I2s0);
#[cfg(i2s1)]
interrupt_handler!(I2s1);
}
}
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