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build(deps): bump third_party/yosys from 07ac4c2 to 4b67f37
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Bumps [third_party/yosys](https://github.com/YosysHQ/yosys) from `07ac4c2` to `4b67f37`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](YosysHQ/yosys@07ac4c2...4b67f37)

---
updated-dependencies:
- dependency-name: third_party/yosys
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <[email protected]>
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dependabot[bot] committed Jun 1, 2024
1 parent bb7d53d commit 38119cb
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion third_party/yosys
Submodule yosys updated 54 files
+55 −0 .github/ISSUE_TEMPLATE/docs_report.yml
+14 −0 .github/workflows/extra-builds.yml
+17 −8 .github/workflows/test-build.yml
+21 −0 .github/workflows/update-flake-lock.yml
+1 −0 .gitignore
+10 −3 Makefile
+1 −0 backends/cxxrtl/cxxrtl_backend.cc
+14 −0 docs/source/_static/yosyshq.css
+4 −4 docs/source/appendix/primer.rst
+16 −16 docs/source/getting_started/example_synth.rst
+3 −3 docs/source/getting_started/scripting_intro.rst
+1 −1 docs/source/introduction.rst
+12 −12 docs/source/using_yosys/more_scripting/interactive_investigation.rst
+13 −13 docs/source/using_yosys/more_scripting/selections.rst
+4 −4 docs/source/using_yosys/synthesis/cell_libs.rst
+20 −20 docs/source/using_yosys/synthesis/extract.rst
+2 −2 docs/source/using_yosys/synthesis/memory.rst
+4 −4 docs/source/using_yosys/synthesis/opt.rst
+3 −3 docs/source/using_yosys/synthesis/proc.rst
+2 −2 docs/source/yosys_internals/extending_yosys/extensions.rst
+1 −1 docs/source/yosys_internals/flow/control_and_data.rst
+1 −1 docs/source/yosys_internals/flow/overview.rst
+1 −1 docs/source/yosys_internals/flow/verilog_frontend.rst
+46 −2 docs/source/yosys_internals/formats/cell_library.rst
+1 −1 docs/source/yosys_internals/formats/rtlil_rep.rst
+5 −5 docs/source/yosys_internals/techmap.rst
+61 −0 flake.lock
+48 −0 flake.nix
+1 −0 passes/cmds/Makefile.inc
+116 −0 passes/cmds/box_derive.cc
+33 −5 passes/cmds/logcmd.cc
+30 −11 passes/cmds/select.cc
+0 −3 techlibs/intel_alm/Makefile.inc
+1 −413 techlibs/intel_alm/common/alm_sim.v
+0 −33 techlibs/intel_alm/common/bram_m20k.txt
+0 −31 techlibs/intel_alm/common/bram_m20k_map.v
+0 −32 techlibs/intel_alm/common/dff_sim.v
+5 −51 techlibs/intel_alm/common/mem_sim.v
+0 −311 techlibs/intel_alm/common/quartus_rename.v
+10 −71 techlibs/intel_alm/synth_intel_alm.cc
+0 −9 tests/arch/intel_alm/add_sub.ys
+0 −46 tests/arch/intel_alm/adffs.ys
+1 −0 tests/arch/intel_alm/blockram.ys
+0 −14 tests/arch/intel_alm/counter.ys
+0 −22 tests/arch/intel_alm/dffs.ys
+0 −22 tests/arch/intel_alm/fsm.ys
+0 −13 tests/arch/intel_alm/logic.ys
+1 −0 tests/arch/intel_alm/lutram.ys
+0 −25 tests/arch/intel_alm/mul.ys
+0 −43 tests/arch/intel_alm/mux.ys
+0 −26 tests/arch/intel_alm/quartus_ice.ys
+0 −11 tests/arch/intel_alm/shifter.ys
+0 −14 tests/arch/intel_alm/tribuf.ys
+53 −0 tests/various/box_derive.ys

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