simd: Specify RVV v0.11 requirement

Signed-off-by: Hiroshi Hatake <[email protected]>
fluent · Dec 19, 2024 · 77f6ba0 · 77f6ba0
1 parent 14edb1d
commit 77f6ba0
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/include/fluent-bit/flb_simd.h b/include/fluent-bit/flb_simd.h
@@ -59,7 +59,7 @@ typedef __m128i flb_vector32;
 typedef uint8x16_t flb_vector8;
 typedef uint32x4_t flb_vector32;
 
-#elif defined(__riscv) && (__riscv_v_intrinsic >= 10000)
+#elif defined(__riscv) && (__riscv_v_intrinsic >= 11000)
 /*
  * We use RVV (RISC-V "Vector") instructions if the compiler provides
  * access to them (as indicated by __riscv_v_intrinsic) and using with