threads: add support for RISC-V (esp32 only)

[elenaf9]

Initial support for threading on RISCV.

For now this only supports the esp32c3 and esp32c6 boards since we depend on specific features from esp-hal.
Adding support for other esp boards can be done in follow up PRs.

Most of the changes are only within the new riscv module, but one general change I'd like to mention:

• Setting threads.current_id to the very first running thread is now done within sched when the thread actually starts running. Before, this was done already in start_threading, but it caused some problems in the RISC-V implementation because then we couldn't differentiate between the thread running for the first time and current_id == next_id. I've tested on both arch'es and it still works with this change, so I think it should be alright?

Note: I have not tested using threading and embassy tasks together. But we also don't have any examples that tested this for cortex-m, so I'd argue that it's out of scope for this PR. Wdyt?

Part of #157.

[kaspar030]

This looks already very nice!

[elenaf9]

This also supports the esp32c6 board now.

I've merged the master without a rebase for now to include #181 but not destroy the history. I'll rebase properly before merge.

[kaspar030]

Please squash & rebase!

[kaspar030]

I think this is good to go, just one thing we need to find a solution for: threading conflicts use of wifi on esp32. So we'll need to model both in laze. I'll come up with sth.

[elenaf9]

Please squash & rebase!

Done. Sorry for the many force-pushes, I accidentally merged to commits during rebase that shouldn't have been merged.

[elenaf9]

I think this is good to go, just one thing we need to find a solution for: threading conflicts use of wifi on esp32. So we'll need to model both in laze. I'll come up with sth.

👍 I'll open an issue for it once this is merged.

Edit: #289.

[kaspar030]

Thanks!