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IceChips is a library of all common discrete logic devices in Verilog

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ice-chips-verilog

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I'm focusing on the 74xx family: devices that were TTL originally (bipolar technologies such as LS, AS), that are now implemented as CMOS (HC, HCT, LV or many other technology variations)

Who

Hobbyist who wants to program an FPGA, or do general digital circuit simulation, and wants to do it from already-proven building blocks

What

Basic logic such as gates, registers, multiplexers, counters, adders, but also non-retriggerable monostable multivibrators

Why

I noticed the 74xx chips do not exist in one place as an open-source catalogue in Verilog (or in VHDL to my knowledge). To see them and create a simulation with them, you would need to open up Xilinx Vivado or ISE or the Intel/Altera Quartus IDE. You can find free simulators and digital playgrounds, but what to type into them? You'll need IceChips.

...Of course you could just buy a breadboard and the ICs. But that's going by different logic.

What to Expect

  • Each device validated by test bench
  • Implemented formally: A single Input/Output/Code template; industry pin names; consistent Verilog
  • Fully parametrized (so you could pretend that a quad or a hex buffer/line driver is actually 64 bits for your FPGA design; you could turn a triple 3-input NAND gate - the workhorse 7410 - into a heptal 5-input NAND gate just by plugging in the two numbers)

Coming soon in 2019: As you see, the sequential devices are being worked on (counters etc.), with tri-state capability being worked on as we speak.

Please contact me if you have a request (and the device number is less than about 74699!)

Purpose

Using one module per logic device (in other words: encapsulated Verilog) promotes compositional design and bottom-up design so that hopefully large logic blocks/cores (from a crypto accelerator, or a coin mining FPGA, to a CPU?) can be created if you validate and spec out each module, step by step. All you need to do is wire the modules together!

Stay tuned because exciting things will happen once the library is built out more!

Usage

The test benches can be run using the open-source simulator Icarus Verilog: Installation, Getting Started.

With it installed on your system you can run a command like the following that specifies the required input files and one output file (.vvp):

> iverilog -g2012 -o 7400-tb.vvp tbhelper.v 7400-tb.v 7400.v

It then requires a second step: Run the Icarus Verilog simulator/runtime to see the tests run, with results logged to the console:

> vvp 7400-tb.vvp

If you're interested in looking even closer, the above vvp run stores signal and timing data of all the inputs, outputs, and the connection paths in the .vcd file, so run GTKWave viewer to see it all as a waveform: Installation, Getting Started.

With GTKWave installed, just click on the .vcd file to open.

Acknowledgments

Coming soon.

© 2018-2019 Tim Rudy

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