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Add a CSR batched matrix format, CUDA, HIP and DPCPP kernels #1246

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Add a CSR batched matrix format, CUDA, HIP and DPCPP kernels

Add a CSR batched matrix format, CUDA, HIP and DPCPP kernels #1246

Triggered via pull request November 25, 2023 19:27
@ginkgo-botginkgo-bot
synchronize #1450
batch-csr-upd
Status Failure
Total duration 28m 23s
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intel.yml

on: pull_request
Matrix: intel
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2 errors
intel/dpcpp/release/shared
Process completed with exit code 8.
intel/icpx/release/shared
Process completed with exit code 8.