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Merge pull request #1419 from hermit-os/rm-raw_boot_info
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fix(arch): remove `RAW_BOOT_INFO`
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mkroening authored Oct 20, 2024
2 parents 05a7857 + bd58ee5 commit 441747d
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Showing 9 changed files with 61 additions and 68 deletions.
15 changes: 2 additions & 13 deletions src/arch/aarch64/kernel/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -13,10 +13,10 @@ pub mod switch;
pub mod systemtime;

use core::arch::global_asm;
use core::str;
use core::sync::atomic::{AtomicU32, AtomicU64, Ordering};
use core::{ptr, str};

use hermit_entry::boot_info::{BootInfo, RawBootInfo};
use hermit_entry::boot_info::BootInfo;

use crate::arch::aarch64::kernel::core_local::*;
use crate::arch::aarch64::kernel::serial::SerialPort;
Expand All @@ -37,23 +37,12 @@ pub(crate) static CURRENT_STACK_ADDRESS: AtomicU64 = AtomicU64::new(0);
#[cfg(target_os = "none")]
global_asm!(include_str!("start.s"));

/// Kernel header to announce machine features
#[cfg_attr(target_os = "none", link_section = ".data")]
static mut RAW_BOOT_INFO: Option<&'static RawBootInfo> = None;
static mut BOOT_INFO: Option<BootInfo> = None;

pub fn boot_info() -> &'static BootInfo {
unsafe { BOOT_INFO.as_ref().unwrap() }
}

pub fn raw_boot_info() -> &'static RawBootInfo {
unsafe { RAW_BOOT_INFO.unwrap() }
}

pub fn get_boot_info_address() -> VirtAddr {
VirtAddr(ptr::from_ref(raw_boot_info()).addr() as u64)
}

pub fn is_uhyve_with_pci() -> bool {
false
}
Expand Down
27 changes: 17 additions & 10 deletions src/arch/aarch64/kernel/start.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@ use hermit_entry::boot_info::{BootInfo, RawBootInfo};
use hermit_entry::Entry;

use crate::arch::aarch64::kernel::scheduler::TaskStacks;
use crate::arch::aarch64::kernel::{BOOT_INFO, RAW_BOOT_INFO};
use crate::arch::aarch64::kernel::BOOT_INFO;
use crate::KERNEL_STACK_SIZE;

extern "C" {
Expand All @@ -14,10 +14,19 @@ extern "C" {
/// Entrypoint - Initialize Stack pointer and Exception Table
#[no_mangle]
#[naked]
pub unsafe extern "C" fn _start(boot_info: &'static RawBootInfo, cpu_id: u32) -> ! {
pub unsafe extern "C" fn _start(boot_info: Option<&'static RawBootInfo>, cpu_id: u32) -> ! {
// validate signatures
const _START: Entry = _start;
const _PRE_INIT: Entry = pre_init;
// `_Start` is compatible to `Entry`
{
unsafe extern "C" fn _entry(_boot_info: &'static RawBootInfo, _cpu_id: u32) -> ! {
unreachable!()
}
pub type _Start =
unsafe extern "C" fn(boot_info: Option<&'static RawBootInfo>, cpu_id: u32) -> !;
const _ENTRY: Entry = _entry;
const _START: _Start = _start;
const _PRE_INIT: _Start = pre_init;
}

unsafe {
asm!(
Expand All @@ -44,12 +53,7 @@ pub unsafe extern "C" fn _start(boot_info: &'static RawBootInfo, cpu_id: u32) ->

#[inline(never)]
#[no_mangle]
unsafe extern "C" fn pre_init(boot_info: &'static RawBootInfo, cpu_id: u32) -> ! {
unsafe {
RAW_BOOT_INFO = Some(boot_info);
BOOT_INFO = Some(BootInfo::from(*boot_info));
}

unsafe extern "C" fn pre_init(boot_info: Option<&'static RawBootInfo>, cpu_id: u32) -> ! {
// set exception table
unsafe {
asm!(
Expand All @@ -66,6 +70,9 @@ unsafe extern "C" fn pre_init(boot_info: &'static RawBootInfo, cpu_id: u32) -> !
}

if cpu_id == 0 {
unsafe {
BOOT_INFO = Some(BootInfo::from(*boot_info.unwrap()));
}
crate::boot_processor_main()
} else {
#[cfg(not(feature = "smp"))]
Expand Down
4 changes: 1 addition & 3 deletions src/arch/aarch64/mm/paging.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6,9 +6,7 @@ use core::{fmt, mem, ptr};

use align_address::Align;

use crate::arch::aarch64::kernel::{
get_base_address, get_boot_info_address, get_image_size, get_ram_address, processor,
};
use crate::arch::aarch64::kernel::{get_base_address, get_image_size, get_ram_address, processor};
use crate::arch::aarch64::mm::{physicalmem, virtualmem, PhysAddr, VirtAddr};
use crate::env::is_uhyve;
use crate::{mm, scheduler, KERNEL_STACK_SIZE};
Expand Down
10 changes: 2 additions & 8 deletions src/arch/riscv64/kernel/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ use core::ptr;
use core::sync::atomic::{AtomicPtr, AtomicU32, AtomicU64, Ordering};

use fdt::Fdt;
use hermit_entry::boot_info::{BootInfo, RawBootInfo};
use hermit_entry::boot_info::BootInfo;
use hermit_sync::OnceCell;
use riscv::register::sstatus;

Expand All @@ -33,7 +33,6 @@ pub(crate) static mut HARTS_AVAILABLE: Vec<usize> = Vec::new();

/// Kernel header to announce machine features
static BOOT_INFO: OnceCell<BootInfo> = OnceCell::new();
static RAW_BOOT_INFO: AtomicPtr<RawBootInfo> = AtomicPtr::new(ptr::null_mut());
static CPU_ONLINE: AtomicU32 = AtomicU32::new(0);
static CURRENT_BOOT_ID: AtomicU32 = AtomicU32::new(0);
static CURRENT_STACK_ADDRESS: AtomicPtr<()> = AtomicPtr::new(ptr::null_mut());
Expand Down Expand Up @@ -195,12 +194,7 @@ pub fn boot_next_processor() {

//When running bare-metal/QEMU we use the firmware to start the next hart
if !env::is_uhyve() {
sbi_rt::hart_start(
next_hart_id as usize,
start::_start as usize,
RAW_BOOT_INFO.load(Ordering::Relaxed) as usize,
)
.unwrap();
sbi_rt::hart_start(next_hart_id as usize, start::_start as usize, 0).unwrap();
}
} else {
info!("All processors are initialized");
Expand Down
23 changes: 18 additions & 5 deletions src/arch/riscv64/kernel/start.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,8 +3,9 @@ use core::sync::atomic::Ordering;

use fdt::Fdt;
use hermit_entry::boot_info::RawBootInfo;
use hermit_entry::Entry;

use super::{get_dtb_ptr, CPU_ONLINE, CURRENT_BOOT_ID, HART_MASK, NUM_CPUS, RAW_BOOT_INFO};
use super::{get_dtb_ptr, CPU_ONLINE, CURRENT_BOOT_ID, HART_MASK, NUM_CPUS};
#[cfg(not(feature = "smp"))]
use crate::arch::riscv64::kernel::processor;
use crate::arch::riscv64::kernel::{BootInfo, BOOT_INFO, CURRENT_STACK_ADDRESS};
Expand All @@ -15,7 +16,20 @@ use crate::KERNEL_STACK_SIZE;
/// Entrypoint - Initalize Stack pointer and Exception Table
#[no_mangle]
#[naked]
pub unsafe extern "C" fn _start() -> ! {
pub unsafe extern "C" fn _start(hart_id: usize, boot_info: Option<&'static RawBootInfo>) -> ! {
// validate signatures
// `_Start` is compatible to `Entry`
{
unsafe extern "C" fn _entry(_hart_id: usize, _boot_info: &'static RawBootInfo) -> ! {
unreachable!()
}
pub type _Start =
unsafe extern "C" fn(hart_id: usize, boot_info: Option<&'static RawBootInfo>) -> !;
const _ENTRY: Entry = _entry;
const _START: _Start = _start;
const _PRE_INIT: _Start = pre_init;
}

unsafe {
asm!(
// Use stack pointer from `CURRENT_STACK_ADDRESS` if set
Expand All @@ -35,13 +49,12 @@ pub unsafe extern "C" fn _start() -> ! {
}
}

unsafe extern "C" fn pre_init(hart_id: usize, boot_info: &'static RawBootInfo) -> ! {
unsafe extern "C" fn pre_init(hart_id: usize, boot_info: Option<&'static RawBootInfo>) -> ! {
CURRENT_BOOT_ID.store(hart_id as u32, Ordering::Relaxed);

if CPU_ONLINE.load(Ordering::Acquire) == 0 {
unsafe {
RAW_BOOT_INFO.store(boot_info as *const _ as *mut _, Ordering::Relaxed);
BOOT_INFO.set(BootInfo::from(*boot_info)).unwrap();
BOOT_INFO.set(BootInfo::from(*boot_info.unwrap())).unwrap();
let fdt = Fdt::from_ptr(get_dtb_ptr()).expect("FDT is invalid");
// Init HART_MASK
let mut hart_mask = 0;
Expand Down
10 changes: 2 additions & 8 deletions src/arch/x86_64/kernel/apic.rs
Original file line number Diff line number Diff line change
Expand Up @@ -82,9 +82,7 @@ const SMP_BOOT_CODE_OFFSET_ENTRY: usize = 0x08;
#[cfg(feature = "smp")]
const SMP_BOOT_CODE_OFFSET_CPU_ID: usize = SMP_BOOT_CODE_OFFSET_ENTRY + 0x08;
#[cfg(feature = "smp")]
const SMP_BOOT_CODE_OFFSET_BOOTINFO: usize = SMP_BOOT_CODE_OFFSET_CPU_ID + 0x04;
#[cfg(feature = "smp")]
const SMP_BOOT_CODE_OFFSET_PML4: usize = SMP_BOOT_CODE_OFFSET_BOOTINFO + 0x08;
const SMP_BOOT_CODE_OFFSET_PML4: usize = SMP_BOOT_CODE_OFFSET_CPU_ID + 0x04;

const X2APIC_ENABLE: u64 = 1 << 10;

Expand Down Expand Up @@ -699,7 +697,7 @@ pub fn init_next_processor_variables() {
pub fn boot_application_processors() {
use core::hint;

use super::{raw_boot_info, start};
use super::start;

let smp_boot_code = include_bytes!(concat!(core::env!("OUT_DIR"), "/boot.bin"));

Expand Down Expand Up @@ -744,10 +742,6 @@ pub fn boot_application_processors() {
(SMP_BOOT_CODE_ADDRESS + SMP_BOOT_CODE_OFFSET_ENTRY).as_mut_ptr(),
start::_start as usize,
);
ptr::write_unaligned(
(SMP_BOOT_CODE_ADDRESS + SMP_BOOT_CODE_OFFSET_BOOTINFO).as_mut_ptr(),
ptr::from_ref(raw_boot_info()).addr() as u64,
);
}

// Now wake up each application processor.
Expand Down
6 changes: 2 additions & 4 deletions src/arch/x86_64/kernel/boot.s
Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,6 @@ _start:
.align 8
entry_point: .8byte 0xDEADC0DE
cpu_id: .4byte 0xC0DECAFE
boot_info: .8byte 0xBEEFBEEF
pml4: .4byte 0xDEADBEEF
pad: .4byte 0

Expand Down Expand Up @@ -151,8 +150,7 @@ stublet:
.code64
.align 8
start64:
# forward address to boot info
mov rdi, [boot_info]
# call `_start`
xor rdi, rdi
mov esi, [cpu_id]
# Jump to _start
jmp [entry_point]
19 changes: 5 additions & 14 deletions src/arch/x86_64/kernel/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -38,20 +38,12 @@ pub(crate) mod systemtime;
#[cfg(feature = "vga")]
mod vga;

/// Kernel header to announce machine features
#[cfg_attr(target_os = "none", link_section = ".data")]
static mut RAW_BOOT_INFO: Option<&'static RawBootInfo> = None;
static mut BOOT_INFO: Option<BootInfo> = None;

pub fn boot_info() -> &'static BootInfo {
unsafe { BOOT_INFO.as_ref().unwrap() }
}

#[cfg(feature = "smp")]
pub fn raw_boot_info() -> &'static RawBootInfo {
unsafe { RAW_BOOT_INFO.unwrap() }
}

/// Serial port to print kernel messages
pub(crate) static COM1: InterruptSpinMutex<Option<SerialPort>> = InterruptSpinMutex::new(None);

Expand Down Expand Up @@ -255,20 +247,19 @@ pub static CURRENT_STACK_ADDRESS: AtomicPtr<u8> = AtomicPtr::new(ptr::null_mut()
#[cfg(target_os = "none")]
#[inline(never)]
#[no_mangle]
unsafe extern "C" fn pre_init(boot_info: &'static RawBootInfo, cpu_id: u32) -> ! {
unsafe extern "C" fn pre_init(boot_info: Option<&'static RawBootInfo>, cpu_id: u32) -> ! {
// Enable caching
unsafe {
let mut cr0 = cr0();
cr0.remove(Cr0::CR0_CACHE_DISABLE | Cr0::CR0_NOT_WRITE_THROUGH);
cr0_write(cr0);
}

unsafe {
RAW_BOOT_INFO = Some(boot_info);
BOOT_INFO = Some(BootInfo::from(*boot_info));
}

if cpu_id == 0 {
unsafe {
BOOT_INFO = Some(BootInfo::from(*boot_info.unwrap()));
}

crate::boot_processor_main()
} else {
#[cfg(not(feature = "smp"))]
Expand Down
15 changes: 12 additions & 3 deletions src/arch/x86_64/kernel/start.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,12 +9,21 @@ use crate::KERNEL_STACK_SIZE;

#[no_mangle]
#[naked]
pub unsafe extern "C" fn _start(_boot_info: &'static RawBootInfo, cpu_id: u32) -> ! {
pub unsafe extern "C" fn _start(_boot_info: Option<&'static RawBootInfo>, cpu_id: u32) -> ! {
// boot_info is in the `rdi` register

// validate signatures
const _START: Entry = _start;
const _PRE_INIT: Entry = pre_init;
// `_Start` is compatible to `Entry`
{
unsafe extern "C" fn _entry(_boot_info: &'static RawBootInfo, _cpu_id: u32) -> ! {
unreachable!()
}
pub type _Start =
unsafe extern "C" fn(boot_info: Option<&'static RawBootInfo>, cpu_id: u32) -> !;
const _ENTRY: Entry = _entry;
const _START: _Start = _start;
const _PRE_INIT: _Start = pre_init;
}

unsafe {
asm!(
Expand Down

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