Indigo Alpha3
Pre-release
Pre-release
This is an alpha release of the PiTubeDirect Indigo version.
IMPORTANT: If you want to use RISC-V BBC Basic on the RISC-V Co Processor, you must use version 20230924 or later, available here.
Changes from Indigo Alpha2 include:
Debugger:
- 3d115e5 Debugger: Fix an issue parsing 32-bit values > 7FFFFFFF
- c272952 Debugger: Refactor param parsing slightly
- f433b51 Debugger: Add search command
Co Pro 23 (RISC-V Co Pro):
- 378b161 Co Pro RISC-V: Change error number from 8-bits to 32-bits (#188)
- 392e36c Co Pro RISC-V: Use same default handler for all uncaught exceptions (#189)
- 3c5b3e5 Co Pro RISC-V: Improve formatting of default uncaught exception handler
- 383983b Co Pro RISC-V: Improve formatting of default uncaught exception handler
- 52fb800 Co Pro RISC-V: Improve disassembler (MUL extension, tighten illegal opcodes) (#195)
- e71beb1 Co Pro RISC-V: Improve disassembler (supress params on ECALL etc) (#195)
- 058c6a3 Co Pro RISC-V: Improve disassembler (CSR and number base) (#195)
- bd90678 Co Pro RISC-V: Improve disassembler (JAL/JALR) (#195)
- 78e06a6 Co Pro RISC-V: Change Co Pro name from RISCV to RISC-V
- 4094004 Co Pro RISC-V: Fix CSR immediate disassembly bug
- bddc721 Co Pro RISC-V: Track elapsedUs (#198)
- 463a477 Co Pro RISC-V: Clear mie on reset
- 9fdc21f Co Pro RISC-V: On ecall, only re-enable ints if previously enabled
- ffcced6 Co Pro RISC-V: Make timermatch registers readable
- 6f1c7d5 Co Pro RISC-V: Clear timer, timermatch on reset
- 6381b54 Co Pro RISC-V: Re-enable interrupts when calling error handler
- 7b7b3ed Co Pro RISC-V: Add seperate system stack, primarily for UncaughtExceptionHandler