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Tracing #1

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1 change: 1 addition & 0 deletions src/sst/elements/ariel/ariel_shmem.h
Original file line number Diff line number Diff line change
Expand Up @@ -64,6 +64,7 @@ enum ArielShmemCmd_t {
ARIEL_ISSUE_CUDA = 144,
ARIEL_FLUSHLINE_INSTRUCTION = 154,
ARIEL_FENCE_INSTRUCTION = 155,
ARIEL_CONDITIONAL_BRANCH = 156,
};

#ifdef HAVE_CUDA
Expand Down
45 changes: 44 additions & 1 deletion src/sst/elements/ariel/arielcore.cc
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,8 @@

#include <sst_config.h>
#include "arielcore.h"
#include <iostream>
#include <chrono>

#ifdef HAVE_CUDA
#include <../balar/balar_event.h>
Expand Down Expand Up @@ -59,6 +61,11 @@ ArielCore::ArielCore(ComponentId_t id, ArielTunnel *tunnel,
pendingTransactions = new std::unordered_map<SimpleMem::Request::id_t, SimpleMem::Request*>();
pending_transaction_count = 0;

tracefile = "/tmp/arielcore";
tracefile = tracefile + std::to_string((uint64_t)id) + ".ssv";

tracefp.open(tracefile, std::ios::out | std::ios::trunc);

#ifdef HAVE_CUDA
midTransfer = false;
remainingTransfer = 0;
Expand Down Expand Up @@ -100,6 +107,10 @@ ArielCore::ArielCore(ComponentId_t id, ArielTunnel *tunnel,
statFPSPOps = registerStatistic<uint64_t>("fp_sp_ops", subID);
statFPDPOps = registerStatistic<uint64_t>("fp_dp_ops", subID);

// Model time
model_time = registerStatistic<uint64_t>("model_time", subID);


free(subID);

memmgr->registerInterruptHandler(coreID, new ArielMemoryManager::InterruptHandler<ArielCore>(this, &ArielCore::handleInterrupt));
Expand Down Expand Up @@ -131,6 +142,8 @@ ArielCore::~ArielCore() {
if(enableTracing && traceGen) {
delete traceGen;
}

tracefp.close();
}

void ArielCore::setCacheLink(SimpleMem* newLink) {
Expand Down Expand Up @@ -288,7 +301,7 @@ void ArielCore::handleEvent(SimpleMem::Request* event) {
if( verbosity >= 16) {
for(int i = 0; i < getPageTransfer(); i++)
output->verbose(CALL_INFO, 16, 0, "%" PRIu32 ", ",
getDataAddress()[i]);
getDataAddress()[i]);
output->verbose(CALL_INFO, 16, 0, "\n");
}

Expand Down Expand Up @@ -782,6 +795,9 @@ bool ArielCore::hasDrainCompleted() const {
}

bool ArielCore::refillQueue() {

auto model_start = std::chrono::steady_clock::now();

ARIEL_CORE_VERBOSE(16, output->verbose(CALL_INFO, 16, 0, "Refilling event queue for core %" PRIu32 "...\n", coreID));

while(coreQ->size() < maxQLength) {
Expand All @@ -804,6 +820,10 @@ bool ArielCore::refillQueue() {
fprintf(stdout, "Performing statistics output at simulation time = %" PRIu64 " cycles\n", getCurrentSimTimeNano());
performGlobalStatisticOutput();
break;
case ARIEL_CONDITIONAL_BRANCH:
//printf("Recieved info on conditional branch: %ld\n", ac.instPtr);
// TODO: Send info to phase detector
break;

case ARIEL_START_INSTRUCTION:
if(ARIEL_INST_SP_FP == ac.inst.instClass) {
Expand Down Expand Up @@ -835,10 +855,14 @@ bool ArielCore::refillQueue() {

switch(ac.command) {
case ARIEL_PERFORM_READ:
// PAT
//printf("0 %"PRIu64" %"PRIu64"\n", ac.instPrt, ac.inst.addr);
tracefp << "0 " << ac.instPtr << " " << ac.inst.addr << std::endl;
createReadEvent(ac.inst.addr, ac.inst.size);
break;

case ARIEL_PERFORM_WRITE:
tracefp << "1 " << ac.instPtr << " " << ac.inst.addr << std::endl;
createWriteEvent(ac.inst.addr, ac.inst.size, &ac.inst.payload[0]);
break;

Expand Down Expand Up @@ -901,6 +925,9 @@ bool ArielCore::refillQueue() {
}

ARIEL_CORE_VERBOSE(16, output->verbose(CALL_INFO, 16, 0, "Refilling event queue for core %" PRIu32 " is complete\n", coreID));
auto model_stop = std::chrono::steady_clock::now();
auto model_delta = std::chrono::duration_cast<std::chrono::nanoseconds>(model_stop - model_start);
model_time->addData(model_delta.count());
return true;
}

Expand All @@ -911,6 +938,8 @@ void ArielCore::handleFreeEvent(ArielFreeEvent* rFE) {
}

void ArielCore::handleReadRequest(ArielReadEvent* rEv) {
auto model_start = std::chrono::steady_clock::now();

ARIEL_CORE_VERBOSE(4, output->verbose(CALL_INFO, 4, 0, "Core %" PRIu32 " processing a read event...\n", coreID));

const uint64_t readAddress = rEv->getAddress();
Expand Down Expand Up @@ -982,9 +1011,13 @@ void ArielCore::handleReadRequest(ArielReadEvent* rEv) {

statReadRequests->addData(1);
statReadRequestSizes->addData(readLength);
auto model_stop = std::chrono::steady_clock::now();
auto model_delta = std::chrono::duration_cast<std::chrono::nanoseconds>(model_stop - model_start);
model_time->addData(model_delta.count());
}

void ArielCore::handleWriteRequest(ArielWriteEvent* wEv) {
auto model_start = std::chrono::steady_clock::now();
ARIEL_CORE_VERBOSE(4, output->verbose(CALL_INFO, 4, 0, "Core %" PRIu32 " processing a write event...\n", coreID));

const uint64_t writeAddress = wEv->getAddress();
Expand Down Expand Up @@ -1070,6 +1103,9 @@ void ArielCore::handleWriteRequest(ArielWriteEvent* wEv) {

statWriteRequests->addData(1);
statWriteRequestSizes->addData(writeLength);
auto model_stop = std::chrono::steady_clock::now();
auto model_delta = std::chrono::duration_cast<std::chrono::nanoseconds>(model_stop - model_start);
model_time->addData(model_delta.count());
}


Expand Down Expand Up @@ -1312,6 +1348,9 @@ void ArielCore::printCoreStatistics() {

bool ArielCore::processNextEvent() {

auto model_start = std::chrono::steady_clock::now();


// Upon every call, check if the core is drained and we are fenced. If so, unfence
// return true; /* Todo: reevaluate if this is needed */
// Attempt to refill the queue
Expand Down Expand Up @@ -1449,6 +1488,10 @@ bool ArielCore::processNextEvent() {
break;
}

auto model_stop = std::chrono::steady_clock::now();
auto model_delta = std::chrono::duration_cast<std::chrono::nanoseconds>(model_stop - model_start);
model_time->addData(model_delta.count());

// If the event has actually been processed this cycle then remove it from the queue
if(removeEvent) {
ARIEL_CORE_VERBOSE(8, output->verbose(CALL_INFO, 8, 0, "Removing event from pending queue, there are %" PRIu32 " events in the queue before deletion.\n",
Expand Down
6 changes: 6 additions & 0 deletions src/sst/elements/ariel/arielcore.h
Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,8 @@
#include <stdint.h>
#include <poll.h>

#include <fstream>

#include <string>
#include <queue>
#include <unordered_map>
Expand Down Expand Up @@ -180,6 +182,9 @@ class ArielCore : public ComponentExtension {
uint32_t coreID;
uint32_t maxPendingTransactions;

std::string tracefile;
std::ofstream tracefp;

#ifdef HAVE_CUDA
size_t totalTransfer;
bool gpu_enabled;
Expand Down Expand Up @@ -255,6 +260,7 @@ class ArielCore : public ComponentExtension {
Statistic<uint64_t>* statFPSPSIMDIns;
Statistic<uint64_t>* statFPSPScalarIns;
Statistic<uint64_t>* statFPSPOps;
Statistic<uint64_t>* model_time;

uint32_t pending_transaction_count;
uint32_t pending_gpu_transaction_count;
Expand Down
1 change: 1 addition & 0 deletions src/sst/elements/ariel/arielcpu.cc
Original file line number Diff line number Diff line change
Expand Up @@ -188,6 +188,7 @@ ArielCPU::ArielCPU(ComponentId_t id, Params& params) :

// Set max number of instructions
cpu_cores[i]->setMaxInsts(max_insts);

}

// Find all the components loaded into the "memory" slot
Expand Down
1 change: 1 addition & 0 deletions src/sst/elements/ariel/arielcpu.h
Original file line number Diff line number Diff line change
Expand Up @@ -101,6 +101,7 @@ class ArielCPU : public SST::Component {
{ "fp_sp_scalar_ins", "Statistic for counting SP-FP Non-SIMD instructons", "instructions", 1 },
{ "fp_sp_ops", "Statistic for counting SP-FP operations (inst * SIMD width)", "instructions", 1 },
{ "cycles", "Statistic for counting cycles of the Ariel core.", "cycles", 1 },
{ "model_time", "Time spent in modeling", "ns", 1},
{ "active_cycles", "Statistic for counting active cycles (cycles not idle) of the Ariel core.", "cycles", 1 })

SST_ELI_DOCUMENT_SUBCOMPONENT_SLOTS(
Expand Down
22 changes: 22 additions & 0 deletions src/sst/elements/ariel/frontend/pin3/fesimple.cc
Original file line number Diff line number Diff line change
Expand Up @@ -471,6 +471,22 @@ VOID WriteInstructionWriteOnly(THREADID thr, ADDRINT* writeAddr, UINT32 writeSiz

}

VOID WriteInstructionConditionalBranch(THREADID thr, ADDRINT ip)
{

// TODO: Currently, we just get the IP of the branch. We can
// get the target info in the future.
if(enable_output) {
if(thr < core_count) {
ArielCommand ac;
ac.command = ARIEL_CONDITIONAL_BRANCH;
ac.instPtr = (uint64_t) ip;
tunnel->writeMessage(thr, ac);
}
}

}

VOID IncrementFunctionRecord(VOID* funcRecord)
{
ArielFunctionRecord* arielFuncRec = (ArielFunctionRecord*) funcRecord;
Expand Down Expand Up @@ -570,6 +586,12 @@ VOID InstrumentInstruction(INS ins, VOID *v)
IARG_UINT32, instClass,
IARG_UINT32, simdOpWidth,
IARG_END);
} else if( INS_IsBranch(ins) && INS_HasFallThrough(ins) ) {
INS_InsertPredicatedCall(ins, IPOINT_BEFORE, (AFUNPTR)
WriteInstructionConditionalBranch,
IARG_THREAD_ID,
IARG_INST_PTR,
IARG_END);
} else {
INS_InsertPredicatedCall(ins, IPOINT_BEFORE, (AFUNPTR)
WriteNoOp,
Expand Down
3 changes: 2 additions & 1 deletion src/sst/elements/memHierarchy/memNICBase.h
Original file line number Diff line number Diff line change
Expand Up @@ -180,7 +180,8 @@ class MemNICBase : public MemLinkBase {
if (sourceIDs.find(imre->info.id) != sourceIDs.end()) {
addSource(imre->info);
dbg.debug(_L10_, "\tAdding to sourceEndpointInfo. %zu sources found\n", sourceEndpointInfo.size());
} else if (destIDs.find(imre->info.id) != destIDs.end()) {
}
if (destIDs.find(imre->info.id) != destIDs.end()) {
addDest(imre->info);
dbg.debug(_L10_, "\tAdding to destEndpointInfo. %zu destinations found\n", destEndpointInfo.size());
}
Expand Down